4.2.40 · D2Operating Systems

Visual walkthrough — Virtualization — type 1 and type 2 hypervisors

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We will build up to the parent's central claim:

Don't worry about that equation yet — you don't have the pieces. Let's earn them.


Step 1 — What "the metal" actually is

WHY start here: every layer we stack later is defined relative to the metal. If you don't fix what "the bottom" is, the words "Type 1" and "Type 2" have no meaning — they are literally names for how far from the metal the hypervisor sits.

PICTURE:

Figure — Virtualization — type 1 and type 2 hypervisors

Look at the grey slab at the bottom. The CPU block has a small notch labelled privilege pins — hold onto that, it becomes the whole game in Step 3.


Step 2 — Why one CPU cannot honestly serve two kingdoms

WHY this matters: this collision is the entire reason a hypervisor exists. If two OSes could politely share hardware on their own, we'd need no new software. They can't, because neither knows the other is there.

PICTURE:

Figure — Virtualization — type 1 and type 2 hypervisors

Two guest OSes (the lavender and coral boxes) both reach for the same disk. The red clash-mark in the middle is the problem we must solve. Notice: neither guest is "wrong" — each is behaving exactly as a lone OS should. (This is the same clash context switching solves for processes inside one OS — here we need it one level higher, for whole OSes.)

Recall Why can't we just tell each OS "be polite"?

Because an OS's whole design assumes it is alone. ::: Rewriting every OS to cooperate would break compatibility — the parent's whole selling point. We need a referee below them that they don't even know about.


Step 3 — Privilege rings: the CPU already sorts instructions by danger

WHY the CPU has this: so that ordinary apps in Ring 3 cannot crash the machine. If an app tries a privileged instruction, the CPU refuses and traps — it stops the app and jumps to the kernel to decide what to do (this jump is a trap).

PICTURE:

Figure — Virtualization — type 1 and type 2 hypervisors

The two concentric rings: inner lavender = Ring 0 (trusted), outer mint = Ring 3 (untrusted). The coral arrow shows a Ring-3 instruction hitting the wall and bouncing inward as a trap.


Step 4 — The trick: demote the guest, seat the hypervisor in Ring 0

WHY this is the whole solution: the guest thinks it ran the instruction. In reality the hypervisor caught it, checked it, and faked a believable result — then handed control back. The guest never learns it isn't alone. This is called trap-and-emulate.

PICTURE:

Figure — Virtualization — type 1 and type 2 hypervisors

Follow the numbered arrows: (1) guest runs disable interrupts; (2) CPU traps to the hypervisor in Ring 0; (3) hypervisor emulates it just for this guest; (4) control returns. The guest's arrow and the "real" arrow never touch — that gap is the illusion.


Step 5 — The edge case: when a dangerous instruction refuses to trap

WHY this breaks everything: if a sensitive instruction doesn't trap, the hypervisor never gets called, so it can't emulate it. The guest silently does the wrong thing — the illusion cracks. This is exactly the gap the parent's Popek & Goldberg condition names.

PICTURE:

Figure — Virtualization — type 1 and type 2 hypervisors

Left path (green): a well-behaved sensitive instruction — sensitive and privileged, so it traps. Right path (red): the rogue instruction — sensitive but not privileged, so it slips past Ring 0 and corrupts the guest's view. The set diagram at top shows the condition: the "sensitive" circle must sit inside the "privileged" circle.


Step 6 — Counting layers: where the two Types diverge

WHY it costs time: each layer crossing is a context switch — save registers, change privilege, restore (the context switch machinery). That costs a fixed toll, call it .

PICTURE:

Figure — Virtualization — type 1 and type 2 hypervisors

Two stacks side by side. Type 1 (left): guest → hypervisor → hardware, 1 crossing marked. Type 2 (right): guest → hypervisor → host OS → hardware, 2 crossings marked. The extra butter-colored slab is the whole difference.


Step 7 — Plugging in numbers (the parent's Example 3, seen)

  • : one crossing → add one .
  • : two crossings → add two .

The relative slowdown of Type 2:

  • Numerator — the cost of that one extra host-OS layer.
  • Divide by — express it as a fraction of the Type-1 time, i.e. "how much slower."

WHY this is the punchline: the number isn't universal (real overhead is mostly in I/O), but the shape is exact — Type 2's extra layer is a real, countable toll. That single extra slab in the Step-6 picture is the 16.7%.

PICTURE:

Figure — Virtualization — type 1 and type 2 hypervisors

A bar chart: base (grey) plus blocks stacked. Type 2's bar is exactly one taller. The label shows the gap.


The one-picture summary

Figure — Virtualization — type 1 and type 2 hypervisors

Everything at once: the metal at the bottom, the CPU's ring wall, the hypervisor seated in Ring 0, a guest's privileged instruction trapping upward and being emulated, and — on the right — the two Types differing by exactly one layer with the toll beside each.

Recall Feynman: tell the whole walkthrough to a 12-year-old

A computer is a slab of silicon (Step 1). One "boss program" (an OS) normally owns it all — but two bosses on one slab fight over the disk and memory (Step 2). Luckily the CPU already sorts instructions into safe and dangerous, and if untrusted code tries a dangerous one the machine freezes it and calls a trusted referee (Step 3). So we install a tiny referee — the hypervisor — as the top-trust code, and demote every boss below it. Now when a boss tries something dangerous, the CPU calls the referee, who fakes a believable answer just for that boss, who never realizes it's sharing (Step 4). One catch: some old dangerous instructions don't trigger the freeze, so the referee never hears them — we patch that with binary translation, paravirtualization, or hardware guest-mode (Step 5). Finally: every "please touch the hardware" request has to travel through each software layer and back, paying a small toll per layer. Type 1 = referee sits right on the metal → one toll. Type 2 = referee is an app on top of a normal OS → two tolls (Step 6). With the parent's numbers that extra toll makes Type 2 about 16.7% slower here (Step 7). One picture, one story: trap the dangerous, fake the result, and count your layers.

Related: Memory Management (the hypervisor also fakes each guest's RAM), Containers vs Virtual Machines (a lighter isolation with zero guest OSes), Cloud Computing (Type 1 is what data centers run), and the parent Hinglish note inside Operating Systems.


Active recall

Why does the hypervisor need to sit in Ring 0 rather than Ring 3?
So the CPU traps the guest's privileged instructions into the hypervisor; only Ring-0 code receives those traps.
What must be true of the instruction set for clean trap-and-emulate?
Every sensitive instruction must be privileged (Popek & Goldberg): sensitive ⊆ privileged.
In , what is for Type 2 and why?
, because the request crosses the hypervisor and the host OS before reaching hardware.
Why is a hypervisor faster than a pure emulator?
It runs harmless guest instructions directly on the real CPU and only traps the dangerous ones, instead of simulating every instruction.