4.2.1 · D3Operating Systems

Worked examples — OS roles — resource management, hardware abstraction, protection

3,440 words16 min readBack to topic

This page is the drill ground for OS roles — resource management, hardware abstraction, protection. We do not introduce new theory — we take the tools you already met (the utilization formula , the two CPU modes, the system-call gate, the MMU check) and push them through every case that can occur: every sign, every extreme, the degenerate inputs, a word problem, and an exam-style trap.


The scenario matrix

The only quantitative tool here is , where:

# Cell class What makes it special Example
A Typical middle case , small Ex 1
B Growing (limiting behaviour) , watch Ex 2
C Degenerate process never waits (pure CPU) Ex 3
D Degenerate process always waits (pure I/O) Ex 3
E Boundary no multiprogramming at all Ex 3
F Real-world word problem translate English → → decision Ex 4
G Protection: memory access unmapped address, MMU fault Ex 6
H Protection: privileged instruction user mode + privileged op Ex 7
I Abstraction: same call, two devices driver differs, contract same Ex 8
J Exam twist "how many processes to hit a target ?" — invert the formula Ex 5

The figures below carry the geometry of cells A/B (the utilization curve) and cells G/H (the protection gate). Everything else is arithmetic or logic you can follow line by line.


Part 1 — Resource management (cells A–F, J)

Figure — OS roles — resource management, hardware abstraction, protection

Figure s01 plots the red curve against (the number of loaded processes) on the horizontal axis, with utilization on the vertical axis. Read it left to right: the curve rises fast then flattens toward the dashed black line at — the asymptote it hugs but never touches. The three black dots mark the exact values we compute in Ex 1 (), Ex 2 (), and the parent note's . Keep this shape in view; it is the whole story of multiprogramming.


Part 2 — Protection & abstraction (cells G, H, I)

Figure — OS roles — resource management, hardware abstraction, protection

Figure s02 draws the two privilege levels as two black boxes: USER MODE on the left (app code, limited power) and KERNEL MODE on the right (the OS, full power). The single red arrow between them is the only legal path — a trap/syscall. The black X below it marks where an illegal attempt (a bad address or a privileged instruction) is stopped and bounced back. In the two protection traces below, I will point to exactly which arrow each step travels.


Recall Quick self-test across the whole matrix

With , what is at ? ::: As for any , what does approach and does it reach it? ::: Approaches but never reaches it (asymptote). If , what is for any ? ::: (never waits, always busy). If , what is ? ::: (always waiting, CPU idle). Which mode is the CPU in when a user program starts a privileged instruction, and what results? ::: User mode ⟹ trap to kernel; instruction faults. When A reads B's memory, why is B safe? ::: The MMU uses A's page table, finds no mapping, faults — it can never reach B. To hit with , how many processes? ::: 19 (since the crossing is at , round up past 18). To exceed with , how many processes? ::: 5 (crossing at , round up). What is a register such as rax? ::: A tiny fast storage slot inside the CPU that instructions read and write. What is SIGSEGV? ::: The signal that kills a process after an illegal memory access — the "segmentation fault".