Level 3 — Production

Transistors - BJT & FET

45 minutes60 marksprintable — key stays hidden on paper

Level 3 — Production (from-scratch derivations, code-from-memory, explain-out-loud) Time limit: 45 minutes Total marks: 60

Instructions: Show all working. Where derivations are requested, start from stated device equations. Constants may be left symbolic unless numbers are given.


Question 1 — BJT switch design from scratch (10 marks)

An NPN BJT drives a relay coil. Supply VCC=12 VV_{CC}=12\text{ V}, collector load resistance RC=120 ΩR_C=120\ \Omega, transistor βmin=50\beta_{min}=50, VCE(sat)=0.2 VV_{CE(sat)}=0.2\text{ V}, VBE(on)=0.7 VV_{BE(on)}=0.7\text{ V}. Driving logic level is 5 V5\text{ V}.

(a) Derive the collector saturation current IC(sat)I_{C(sat)}. (2) (b) Compute the minimum base current for hard saturation and choose a base resistor RBR_B using an overdrive factor of 3. (5) (c) Explain out loud (2–3 sentences) why an overdrive factor > 1 is used in switching design. (3)


Question 2 — α–β relationship derivation (8 marks)

(a) Starting from the KCL relation IE=IC+IBI_E = I_C + I_B and the definitions α=IC/IE\alpha = I_C/I_E, β=IC/IB\beta = I_C/I_B, derive β=α1α\beta = \dfrac{\alpha}{1-\alpha} and α=β1+β\alpha = \dfrac{\beta}{1+\beta}. (5) (b) A transistor has α=0.995\alpha = 0.995. Compute β\beta. Then state how much β\beta changes if α\alpha drops to 0.9900.990, and comment on sensitivity. (3)


Question 3 — MOSFET saturation-current derivation & transconductance (12 marks)

For an NMOS in saturation, ID=12knWL(VGSVth)2I_D = \tfrac{1}{2}k_n\frac{W}{L}(V_{GS}-V_{th})^2 where kn=μnCoxk_n=\mu_n C_{ox}.

(a) Derive the small-signal transconductance gm=ID/VGSg_m = \partial I_D/\partial V_{GS} and show it equals 2knWLID\sqrt{2k_n\frac{W}{L}I_D}. (5) (b) Given knWL=2 mA/V2k_n\frac{W}{L}=2\text{ mA/V}^2, Vth=0.8 VV_{th}=0.8\text{ V}, VGS=2.0 VV_{GS}=2.0\text{ V}, compute IDI_D and gmg_m. (4) (c) Explain why, for a fixed IDI_D, increasing W/LW/L increases gmg_m, and give one design cost of doing so. (3)


Question 4 — Common-emitter amplifier analysis (12 marks)

A CE amplifier: VCC=10 VV_{CC}=10\text{ V}, RC=2 kΩR_C=2\text{ k}\Omega, RE=500 ΩR_E=500\ \Omega (bypassed for AC), voltage-divider bias R1=47 kΩR_1=47\text{ k}\Omega, R2=10 kΩR_2=10\text{ k}\Omega, β=150\beta=150, VBE=0.7 VV_{BE}=0.7\text{ V}.

(a) Compute the DC base (Thevenin) voltage and the emitter/collector currents. (5) (b) Compute gm=IC/VTg_m = I_C/V_T (use VT=25 mVV_T=25\text{ mV}) and the small-signal midband voltage gain Av=gmRCA_v=-g_m R_C. (4) (c) Explain out loud why bypassing RER_E increases gain but worsens bias stability of the AC operating point in one respect. (3)


Question 5 — MOSFET regions & subthreshold, code-from-memory (10 marks)

(a) State the three operating conditions (cutoff, triode, saturation) of an NMOS in terms of VGSV_{GS}, VthV_{th}, and VDSV_{DS}. (3) (b) Write, from memory, a short function (pseudocode or Python) id_nmos(vgs, vds, vth, k) returning drain current using the ideal square-law model, correctly selecting region. (4) (c) Explain what subthreshold leakage is and why it worsens as VthV_{th} is scaled down. (3)


Question 6 — Body effect (8 marks)

The threshold with body bias is Vth=Vth0+γ(2ϕF+VSB2ϕF)V_{th}=V_{th0}+\gamma\left(\sqrt{2\phi_F+V_{SB}}-\sqrt{2\phi_F}\right).

(a) Given Vth0=0.5 VV_{th0}=0.5\text{ V}, γ=0.4 V1/2\gamma=0.4\ \text{V}^{1/2}, 2ϕF=0.7 V2\phi_F=0.7\text{ V}, VSB=1.5 VV_{SB}=1.5\text{ V}, compute VthV_{th}. (4) (b) Explain physically why a positive VSBV_{SB} raises VthV_{th} in an NMOS. (4)


Answer keyMark scheme & solutions

Question 1

(a) In saturation the collector is nearly grounded: IC(sat)=VCCVCE(sat)RC=120.2120=11.8120=0.0983 A98.3 mA.I_{C(sat)}=\frac{V_{CC}-V_{CE(sat)}}{R_C}=\frac{12-0.2}{120}=\frac{11.8}{120}=0.0983\text{ A}\approx 98.3\text{ mA}. (Setup of loop 1 mark, value 1 mark.)

(b) Minimum base current: IB(min)=IC(sat)/βmin=0.0983/50=1.967 mAI_{B(min)}=I_{C(sat)}/\beta_{min}=0.0983/50=1.967\text{ mA}. (2) With overdrive factor 3: IB=3×1.967=5.90 mAI_B = 3\times1.967=5.90\text{ mA}. (1) RB=VlogicVBEIB=50.75.90×103=4.30.00590=729 Ω.R_B=\frac{V_{logic}-V_{BE}}{I_B}=\frac{5-0.7}{5.90\times10^{-3}}=\frac{4.3}{0.00590}=729\ \Omega. Choose nearest standard ≈ 680 Ω680\ \Omega (increases overdrive slightly, safe). (2)

(c) Overdrive (forcing IBI_B above the minimum) guarantees the transistor stays fully saturated despite the lowest possible β\beta (spread across parts/temperature), keeps VCE(sat)V_{CE(sat)} low (low power loss), and speeds turn-on. (3, one mark per valid reason.)


Question 2

(a) From IE=IC+IBI_E=I_C+I_B, divide by ICI_C: IEIC=1+IBIC\frac{I_E}{I_C}=1+\frac{I_B}{I_C}. Since α=IC/IEIE/IC=1/α\alpha=I_C/I_E\Rightarrow I_E/I_C=1/\alpha, and β=IC/IBIB/IC=1/β\beta=I_C/I_B\Rightarrow I_B/I_C=1/\beta: 1α=1+1β1β=1ααβ=α1α.\frac{1}{\alpha}=1+\frac{1}{\beta}\Rightarrow \frac1\beta=\frac{1-\alpha}{\alpha}\Rightarrow \beta=\frac{\alpha}{1-\alpha}. (3) Invert: β(1α)=αβ=α(1+β)α=β1+β.\beta(1-\alpha)=\alpha\Rightarrow\beta=\alpha(1+\beta)\Rightarrow\alpha=\frac{\beta}{1+\beta}. (2)

(b) β=0.9950.005=199\beta=\frac{0.995}{0.005}=199. (1) At α=0.990\alpha=0.990: β=0.9900.010=99\beta=\frac{0.990}{0.010}=99. (1) A 0.5% change in α\alpha roughly halves β\beta (199→99) — β\beta is extremely sensitive to α\alpha near unity. (1)


Question 3

(a) ID=12knWL(VGSVth)2I_D=\tfrac12 k_n\frac WL (V_{GS}-V_{th})^2. Differentiate w.r.t. VGSV_{GS}: gm=IDVGS=knWL(VGSVth).g_m=\frac{\partial I_D}{\partial V_{GS}}=k_n\frac WL (V_{GS}-V_{th}). (3) Since (VGSVth)=2ID/(knW/L)(V_{GS}-V_{th})=\sqrt{2I_D/(k_n W/L)}, gm=knWL2IDknW/L=2knWLID.g_m=k_n\tfrac WL\sqrt{\frac{2I_D}{k_n W/L}}=\sqrt{2k_n\tfrac WL\,I_D}. (2)

(b) Overdrive Vov=2.00.8=1.2 VV_{ov}=2.0-0.8=1.2\text{ V}. ID=12(2m)(1.2)2=12(2×103)(1.44)=1.44 mA.I_D=\tfrac12(2\text{m})(1.2)^2=\tfrac12(2\times10^{-3})(1.44)=1.44\text{ mA}. (2) gm=knWLVov=(2m)(1.2)=2.4 mA/V.g_m=k_n\tfrac WL V_{ov}=(2\text{m})(1.2)=2.4\text{ mA/V}. Check: 2(2m)(1.44m)=5.76×106=2.4 mA/V.\sqrt{2(2\text{m})(1.44\text{m})}=\sqrt{5.76\times10^{-6}}=2.4\text{ mA/V}.(2)

(c) For fixed IDI_D, gm=2kn(W/L)IDg_m=\sqrt{2k_n(W/L)I_D} rises with W/L\sqrt{W/L}; larger device means larger current at same VovV_{ov} (or lower VovV_{ov}), giving more gain. Cost: larger gate capacitance / area → lower bandwidth and more power/chip area. (3)


Question 4

(a) Thevenin: VTH=VCCR2R1+R2=101057=1.754 VV_{TH}=V_{CC}\frac{R_2}{R_1+R_2}=10\cdot\frac{10}{57}=1.754\text{ V}. (2) RTH=R1R2=471057=8.246 kΩR_{TH}=R_1\|R_2=\frac{47\cdot10}{57}=8.246\text{ k}\Omega. IEVTHVBERE+RTH/β=1.7540.7500+8246/150=1.054500+54.97=1.054554.97=1.899 mA.I_E\approx\frac{V_{TH}-V_{BE}}{R_E+R_{TH}/\beta}=\frac{1.754-0.7}{500+8246/150}=\frac{1.054}{500+54.97}=\frac{1.054}{554.97}=1.899\text{ mA}. (2) ICIE=1.90 mAI_C\approx I_E=1.90\text{ mA} (or 1.90\approx1.90 mA neglecting RTH/βR_{TH}/\beta: 1.054/500=2.111.054/500=2.11 mA acceptable if stated). (1)

(b) gm=IC/VT=1.90m/0.025=0.0760 S=76 mSg_m=I_C/V_T=1.90\text{m}/0.025=0.0760\text{ S}=76\text{ mS}. (2) Av=gmRC=(0.076)(2000)=152A_v=-g_m R_C=-(0.076)(2000)=-152. (2)

(c) Bypassing RER_E removes AC negative feedback so full gmRCg_m R_C gain appears (large gain). But without AC feedback the gain now depends directly on gmg_m (hence ICI_C), which varies with temperature and β\beta; so the AC gain becomes far more sensitive to bias-point drift than the emitter-degenerated case. (3)


Question 5

(a) (1 each)

  • Cutoff: VGS<VthV_{GS}<V_{th}ID0I_D\approx0.
  • Triode (linear): VGS>VthV_{GS}>V_{th} and VDS<VGSVthV_{DS}<V_{GS}-V_{th}.
  • Saturation: VGS>VthV_{GS}>V_{th} and VDSVGSVthV_{DS}\ge V_{GS}-V_{th}.

(b) (4: correct region logic 2, correct equations 2)

def id_nmos(vgs, vds, vth, k):   # k = kn*(W/L)
    vov = vgs - vth
    if vov <= 0:
        return 0.0                        # cutoff
    if vds < vov:
        return k * (vov*vds - 0.5*vds**2) # triode
    return 0.5 * k * vov**2               # saturation

(c) Subthreshold leakage is the small drain current that flows when VGS<VthV_{GS}<V_{th} (weak inversion), varying exponentially with VGSV_{GS}. Lowering VthV_{th} shifts that exponential curve so more current flows at VGS=0V_{GS}=0, so off-state leakage rises exponentially as VthV_{th} is scaled down. (3)


Question 6

(a) Vth=0.5+0.4(0.7+1.50.7)=0.5+0.4(2.20.7).V_{th}=0.5+0.4\left(\sqrt{0.7+1.5}-\sqrt{0.7}\right)=0.5+0.4(\sqrt{2.2}-\sqrt{0.7}). 2.2=1.4832\sqrt{2.2}=1.4832, 0.7=0.8367\sqrt{0.7}=0.8367, difference =0.6465=0.6465. Vth=0.5+0.4(0.6465)=0.5+0.2586=0.7586 V0.76 V.V_{th}=0.5+0.4(0.6465)=0.5+0.2586=0.7586\text{ V}\approx0.76\text{ V}. (4)

(b) A positive VSBV_{SB} reverse-biases the source–body junction, widening the depletion region under the channel. More depletion charge must be supported by the gate before inversion occurs, so a larger VGSV_{GS} (higher VthV_{th}) is needed to form the channel. (4)


[
  {"claim":"Q1a Ic_sat = 98.3 mA", "code":"Ic=(12-0.2)/120; result = abs(Ic-0.09833)<1e-4"},
  {"claim":"Q1b RB ~ 729 ohm at overdrive 3", "code":"Ib=3*((12-0.2)/120)/50; RB=(5-0.7)/Ib; result = abs(RB-729)<5"},
  {"claim":"Q2b beta=199 at alpha=0.995", "code":"a=Rational(995,1000); b=a/(1-a); result = b==199"},
  {"claim":"Q3b Id=1.44mA and gm=2.4mS", "code":"Id=Rational(1,2)*2e-3*(1.2)**2; gm=2e-3*1.2; result = abs(Id-1.44e-3)<1e-9 and abs(gm-2.4e-3)<1e-9"},
  {"claim":"Q3a gm equals sqrt(2k*Id)", "code":"k=2e-3; Id=1.44e-3; gm1=k*1.2; gm2=sqrt(2*k*Id); result = abs(float(gm1-gm2))<1e-9"},
  {"claim":"Q6a Vth ~ 0.7586 V", "code":"Vth=0.5+0.4*(sqrt(2.2)-sqrt(0.7)); result = abs(float(Vth)-0.7586)<1e-3"}
]