Level 2 — Recall

Transistors - BJT & FET

30 minutes40 marksprintable — key stays hidden on paper

Level: 2 (Recall / Standard textbook problems) Time limit: 30 minutes Total marks: 40


Q1. Define the three operating regions of a BJT and state the junction bias conditions (base-emitter and base-collector) for each. (6 marks)

Q2. For a BJT, the current gain β=100\beta = 100. (a) Compute α\alpha. (2 marks) (b) If the base current IB=20 μAI_B = 20\ \mu\text{A}, find the collector current ICI_C and emitter current IEI_E. (3 marks)

Q3. An NPN transistor is used as a switch driving an LED. VCC=5 VV_{CC} = 5\text{ V}, collector resistor RC=220 ΩR_C = 220\ \Omega. When saturated, VCE(sat)=0.2 VV_{CE(sat)} = 0.2\text{ V}. (a) Find the collector (saturation) current IC(sat)I_{C(sat)}. (2 marks) (b) If β=100\beta = 100, find the minimum base current needed. Using an overdrive factor of 3, find the design base current. (3 marks)

Q4. State two differences between a JFET and a MOSFET regarding gate construction and gate current. (4 marks)

Q5. Distinguish between enhancement-mode and depletion-mode MOSFETs in terms of the channel at VGS=0V_{GS}=0. (4 marks)

Q6. An NMOS transistor has Vth=1 VV_{th} = 1\text{ V}, kn=12μnCoxWL=0.5 mA/V2k_n = \tfrac{1}{2}\mu_n C_{ox}\frac{W}{L} = 0.5\ \text{mA/V}^2. It operates with VGS=3 VV_{GS} = 3\text{ V} in saturation. (a) State the saturation-region current equation. (1 mark) (b) Compute the drain current IDI_D (ignore channel-length modulation). (3 marks)

Q7. Define transconductance gmg_m of a MOSFET and, for the transistor in Q6, compute gmg_m using gm=2kn(VGSVth)g_m = 2k_n(V_{GS}-V_{th}). (4 marks)

Q8. State the condition (in terms of VGSV_{GS}, VDSV_{DS}, VthV_{th}) that separates the triode and saturation regions of an NMOS. (3 marks)

Q9. Briefly explain the body effect in a MOSFET and its impact on threshold voltage. (3 marks)

Q10. Define subthreshold leakage current and state why it becomes important in modern short-channel devices. (2 marks)

Answer keyMark scheme & solutions

Q1. (6 marks) — 2 marks each region.

  • Cutoff: BE junction reverse (or below-on) biased, BC reverse biased → transistor OFF, IC0I_C \approx 0.
  • Active: BE forward biased, BC reverse biased → IC=βIBI_C = \beta I_B; used for amplification.
  • Saturation: BE forward biased, BC forward biased → transistor fully ON, VCEV_{CE} small, IC<βIBI_C < \beta I_B; used as closed switch.

Q2. (5 marks) (a) α=ββ+1=100101=0.9901\alpha = \dfrac{\beta}{\beta+1} = \dfrac{100}{101} = 0.9901. (2) (b) IC=βIB=100×20 μA=2 mAI_C = \beta I_B = 100 \times 20\ \mu A = 2\text{ mA}. (1.5) IE=IC+IB=2 mA+0.02 mA=2.02 mAI_E = I_C + I_B = 2\text{ mA} + 0.02\text{ mA} = 2.02\text{ mA}. (1.5)

Q3. (5 marks) (a) IC(sat)=VCCVCE(sat)RC=50.2220=4.8220=21.8 mAI_{C(sat)} = \dfrac{V_{CC}-V_{CE(sat)}}{R_C} = \dfrac{5-0.2}{220} = \dfrac{4.8}{220} = 21.8\text{ mA}. (2) (b) IB(min)=IC(sat)β=21.8 mA100=0.218 mAI_{B(min)} = \dfrac{I_{C(sat)}}{\beta} = \dfrac{21.8\text{ mA}}{100} = 0.218\text{ mA}. (1.5) With overdrive factor 3: IB=3×0.218=0.654 mAI_B = 3 \times 0.218 = 0.654\text{ mA}. (1.5)

Q4. (4 marks) — 2 marks each.

  • Gate construction: JFET gate is a reverse-biased pn junction (no insulator); MOSFET gate is a metal/poly electrode separated from channel by an oxide insulator.
  • Gate current: JFET has tiny reverse leakage current; MOSFET gate is DC-isolated by oxide → essentially zero (only capacitive) gate current.

Q5. (4 marks) — 2 marks each.

  • Enhancement-mode: no conducting channel exists at VGS=0V_{GS}=0 (normally OFF); a channel must be induced by applying VGS>Vth|V_{GS}| > |V_{th}|.
  • Depletion-mode: a channel exists at VGS=0V_{GS}=0 (normally ON); gate voltage is used to deplete/reduce the channel to turn it off.

Q6. (4 marks) (a) ID=kn(VGSVth)2I_D = k_n (V_{GS}-V_{th})^2 (with kn=12μnCoxW/Lk_n = \tfrac12 \mu_n C_{ox} W/L). (1) (b) VGSVth=31=2 VV_{GS}-V_{th} = 3-1 = 2\text{ V}; ID=0.5×(2)2=0.5×4=2 mAI_D = 0.5\times(2)^2 = 0.5\times4 = 2\text{ mA}. (3)

Q7. (4 marks) Definition: gm=IDVGSg_m = \dfrac{\partial I_D}{\partial V_{GS}} — change in drain current per unit change in gate-source voltage (small-signal gain of the transistor). (2) Computation: gm=2kn(VGSVth)=2×0.5×2=2 mA/Vg_m = 2k_n(V_{GS}-V_{th}) = 2\times0.5\times2 = 2\text{ mA/V}. (2)

Q8. (3 marks) Assume VGS>VthV_{GS} > V_{th} (device ON).

  • Triode: VDS<VGSVthV_{DS} < V_{GS}-V_{th} (i.e. VDS<VovV_{DS} < V_{ov}). (1.5)
  • Saturation: VDSVGSVthV_{DS} \ge V_{GS}-V_{th}. (1.5)

Q9. (3 marks) Body effect: when the source-to-body voltage VSBV_{SB} is non-zero (reverse), the depletion region widens, requiring more gate charge and thus increasing the threshold voltage: Vth=Vth0+γ(2ϕF+VSB2ϕF)V_{th} = V_{th0} + \gamma(\sqrt{2\phi_F + V_{SB}} - \sqrt{2\phi_F}). Effect: VthV_{th} rises with increasing VSBV_{SB}.

Q10. (2 marks) Subthreshold leakage: the small drain current that flows when VGS<VthV_{GS} < V_{th} (weak inversion), varying exponentially with VGSV_{GS}. Important in short-channel/low-VthV_{th} devices because it causes static power dissipation and grows as devices scale down.

[
  {"claim":"alpha for beta=100 is 100/101","code":"beta=100; alpha=beta/(beta+1); result = abs(alpha-0.990099)<1e-5"},
  {"claim":"IC=2mA and IE=2.02mA for IB=20uA","code":"IB=20e-6; IC=100*IB; IE=IC+IB; result = abs(IC-2e-3)<1e-9 and abs(IE-2.02e-3)<1e-9"},
  {"claim":"IC_sat = 4.8/220 A approx 21.8mA","code":"Ic=(5-0.2)/220; result = abs(Ic-0.021818)<1e-5"},
  {"claim":"ID=2mA for kn=0.5mA/V2, Vov=2V","code":"kn=0.5e-3; ID=kn*(3-1)**2; result = abs(ID-2e-3)<1e-9"},
  {"claim":"gm=2mA/V","code":"kn=0.5e-3; gm=2*kn*(3-1); result = abs(gm-2e-3)<1e-9"}
]