Sequential Circuits

Question 1

(a) Setup constraint: $T_{clk} \ge t_{cq} + t_{logic,\max} + t_{su}$. $T_{clk} \ge 0.6 + 4.2 + 0.3 = 5.1\text{ ns}$. (2) $f_{\max} = 1/5.1\text{ ns} = 196.1\text{ MHz}$. (2)

(b) Positive skew (capture later) relaxes setup: $T_{clk} \ge t_{cq}+t_{logic,\max}+t_{su}-t_{skew} = 5.1 - 0.5 = 4.6\text{ ns}$. (2) $f_{\max} = 1/4.6\text{ ns} = 217.4\text{ MHz}$. Frequency increases because the capture edge has more time to wait for data. (2)

(c) Hold constraint: $t_{cq}+t_{logic,\min} \ge t_h + t_{skew}$.

• $t_{skew}=0$: $0.6+0.5 = 1.1 \ge 0.4$ ✓ no violation. (2)
• $t_{skew}=+0.5$: need $1.1 \ge 0.4+0.5 = 0.9$ ✓ still holds (margin 0.2 ns). (2)

(d) Positive skew gives the setup path extra time (capture edge later ⇒ longer effective period), but the same delayed capture edge means new data can arrive too soon relative to the still-required hold window, eroding hold margin. (2)

Question 2

(a) JK characteristic: $Q^+ = J\bar{Q} + \bar{K}Q$. T characteristic: $Q^+ = T \oplus Q$, so $T = Q^+ \oplus Q$. (2) Substitute: $T = (J\bar{Q}+\bar{K}Q) \oplus Q$. Evaluate by cases: when $Q=0$, $Q^+=J$, so $T = J$. When $Q=1$, $Q^+=\bar K$, so $T = \bar K \oplus 1 = K$. (2) Thus $\boxed{T = J\bar{Q} + KQ}$. (2)

(b) Table:

All four JK operations reproduced. (4)

(c) T flip-flops directly implement toggling, so ripple/binary counters need no external combinational feedback per stage (T tied to 1 = divide-by-2). (2)

Question 3

State encoding $Q_2Q_1Q_0$; sequence $0(000)\to3(011)\to5(101)\to6(110)\to0$.

(a) State table:

(4)

(b) Since $D_i = Q_i^+$, fill K-maps over the 4 defined minterms (rest = don't-care).

Defined outputs:

• 000 → $D_2D_1D_0 = 0\,1\,1$
• 011 → $1\,0\,1$
• 101 → $1\,1\,0$
• 110 → $0\,0\,0$

$D_2$: =1 at states 011,101; =0 at 000,110. A valid minimal cover using don't-cares: $D_2 = Q_0$ (check: 000→Q0=0=D2✓; 011→Q0=1=1✓; 101→Q0=1=1✓; 110→Q0=0=0✓). (2)

$D_1$: =1 at 000 only; =0 at 011,101,110. $D_1 = \bar{Q_2}\,\bar{Q_1}\,\bar{Q_0}$ works, but using don't-cares simplify: 000 is the only 1. Choose $D_1=\overline{Q_2}\,\overline{Q_0}$ (check: 000→1✓; 011→Q0=1→0✓; 101→Q2=1→0✓; 110→Q0=0,Q2=1→0✓). (3)

$D_0$: =1 at 000,011; =0 at 101,110. $D_0 = \overline{Q_2}$ (check: 000→1✓; 011→1✓; 101→0✓; 110→0✓). (2)

Final: $D_2=Q_0,\quad D_1=\overline{Q_2}\,\overline{Q_0},\quad D_0=\overline{Q_2}$.

(c) Self-start check — trace unused states with these equations:

• 001: $D_2=Q_0=1,D_1=\bar Q_2\bar Q_0=0,D_0=\bar Q_2=1 →101$ (in main cycle) ✓
• 010: $D_2=0,D_1=\bar Q_2\bar Q_0=1,D_0=1 →011$ ✓
• 100: $D_2=0,D_1=0,D_0=0 →000$ ✓
• 111: $D_2=1,D_1=0,D_0=0 →100→000$ ✓

Every unused state re-enters the main cycle within ≤2 steps; no trapped/hung cycle exists, so the design is self-starting. (3)

Question 4

(a) $T_{200} = 1/200\text{ MHz} = 5\text{ ns}$. (1) Per stage resolution time $t_r = T_{200} - 0.5 = 4.5\text{ ns}$ available for metastability decay. (2)

(b) Two-stage effective resolution time $t_{r,eff} = 4.5+4.5 = 9\text{ ns}$. (1) $f_c = 200\text{ MHz}=2\times10^8$, $f_d = 25\text{ MHz}=2.5\times10^7$, $T_w=0.02\text{ ns}=2\times10^{-11}$s, $\tau=0.15\text{ ns}$. Exponent $t_{r,eff}/\tau = 9/0.15 = 60$. (2) $\text{MTBF} = \frac{e^{60}}{(2\times10^{-11})(2\times10^{8})(2.5\times10^{7})}$ Denominator $= 2\times10^{-11}\times2\times10^{8}\times2.5\times10^{7}=1\times10^{5}$. $e^{60}\approx 1.142\times10^{26}$. $\text{MTBF} \approx 1.142\times10^{21}\text{ s}$ (astronomically safe). (3)

(c) Independent per-bit synchronizers can settle on different clock edges, so bits of a multi-bit word are captured at inconsistent times, giving transient invalid combinations (data incoherence). Correct techniques: gray-code encoding (only one bit changes at a time), or an asynchronous FIFO with handshake / dual-clock FIFO. (3)

Question 5

(a) Moore states (output shown in state):

• S0 (z=0): reset/no useful prefix
• S1 (z=0): seen 1
• S2 (z=0): seen 10
• S3 (z=1): seen 101

Transitions:

• S0: x=0→S0, x=1→S1
• S1: x=0→S2, x=1→S1
• S2: x=0→S0, x=1→S3
• S3: x=0→S2, x=1→S1 (overlap: 1 from S3 restarts)

(4)

(b) State table:

Equivalence: S0 and S3 differ in output (0 vs 1) → not equivalent. S1 and S3 have same transitions (x=0→S2, x=1→S1) but different outputs → not equivalent. No two states share both identical outputs and identical next-state pairs, so no states can be merged; the machine is already minimal (4 states). (4)

[
  {"claim":"Q1a Tmin=5.1ns, fmax≈196.08MHz","code":"Tclk=Rational(6,10)+Rational(42,10)+Rational(3,10); f=1/(Tclk*10**-9); result=(Tclk==Rational(51,10)) and abs(f-196078431)<2000"},
  {"claim":"Q1b with skew 0.5, Tmin=4.6ns, fmax≈217.39MHz","code":"T=Rational(51,10)-Rational(5,10); f=1/(T*10**-9); result=(T==Rational(46,10)) and abs(f-217391304)<3000"},
  {"claim":"Q1c hold holds with skew: 1.1>=0.9","code":"lhs=Rational(6,10)+Rational(5,10); rhs=Rational(4,10)+Rational(5,10); result=(lhs>=rhs)"},
  {"claim":"Q2 T=J*~Q+K*Q reproduces JK char Q+=J~Q+~KQ","code":"from sympy.logic.boolalg import Xor; J,K,Q=symbols('J K Q'); T=(J&~Q)|(K&Q); ok=True; \nfor jv in [0,1]:\n  for kv in [0,1]:\n    for qv in [0,1]:\n      tval=((jv and not qv) or (kv and qv)); qn=tval ^ qv; jkchar=((jv and not qv) or ((not kv) and qv)); ok=ok and (qn==jkchar)\nresult=ok"},
  {"claim":"Q3 next-state eqns reproduce cycle 0->3->5->6->0","code":"def nxt(q2,q1,q0):\n  d2=q0; d1=(1-q2)*(1-q0); d0=1-q2; return (d2,d1,d0)\nseq=[(0,0,0),(0,1,1),(1,0,1),(1,1,0)]; ok=True\nfor i in range(4):\n  ok=ok and nxt(*seq[i])==seq[(i+1)%4]\nresult=ok"},
  {"claim":"Q3 unused states all reach main cycle (self-start)","code":"def nxt(s):\n  q2,q1,q0=s; return (q0,(1-q2)*(1-q0),1-q2)\nmain={(0,0,0),(0,1,1),(1,0,1),(1,1,0)}; ok=True\nfor s in [(0,0,1),(0,1,0),(1,0,0),(1,1,1)]:\n  cur=s; reached=False\n  for _ in range(4):\n    cur=nxt(cur)\n    if cur in main: reached=True; break\n  ok=ok and reached\nresult=ok"},
  {"claim":"Q4 MTBF denominator=1e5 and exponent=60","code":"Tw=Rational(2,10**11); fc=2*10**8; fd=Rational(25,10**6)*10**12/10**6; den=Rational(2,10**11)*2*10**8*25*10**6; expo=Rational(9,Rational(15,100)); result=(expo==60) and (den==100000)"}
]