Diodes & Applications
Level: 4 — Application (novel problems, no hints) Time limit: 60 minutes Total marks: 60
Assume silicon diode forward drop and Schottky unless a datasheet value is given. Use ideal diodes only where explicitly stated.
Question 1 — Rectifier + Filter Design (14 marks)
A designer needs a DC supply that delivers with a maximum peak-to-peak ripple of . The mains transformer secondary provides at . A full-wave bridge rectifier feeds a smoothing capacitor.
(a) Calculate the peak voltage across the load after the bridge (account for the two conducting silicon diodes). (3)
(b) Derive the required smoothing capacitance using the approximation . State the ripple frequency you use and justify it. (5)
(c) The same specification is now attempted with a half-wave rectifier using the identical capacitor from part (b). What ripple voltage results? Comment on why the full-wave topology was the better engineering choice. (4)
(d) State the minimum Peak Inverse Voltage (PIV) rating each diode in the bridge must withstand. (2)
Question 2 — Zener Regulator Under Varying Load (13 marks)
A Zener diode regulates an unregulated input that varies between and . A series resistor is used. The load current varies between and . The Zener requires a minimum holding current of to stay in regulation.
(a) Determine the value of that guarantees regulation under the worst-case combination of input voltage and load current. Identify that worst case and justify it. (6)
(b) Using your chosen , compute the maximum power dissipated in the Zener diode. Identify the input/load condition that produces it. (5)
(c) State one datasheet parameter (other than ) you would check before finalising this Zener choice, and why. (2)
Question 3 — Clipper/Clamper Analysis (12 marks)
An input signal is applied to the circuit below. The diode is ideal (), and a DC battery is in series with the diode; the diode–battery branch is connected from the output node to ground so the diode conducts when the output tries to exceed .
(a) Sketch and describe the output waveform , giving the clipped level and the untouched portion. (4)
(b) Now replace the ideal diode with a silicon diode (). State the new clipping level and explain the shift. (3)
(c) A DC-restorer (clamper) is instead built with a capacitor in series and the same diode-to-ground (cathode to ground, ideal diode). For the same input, state the output DC level and the peak and trough voltages of after the clamp settles. (5)
Question 4 — Optoelectronic Component Calculations (11 marks)
(a) A red LED with is to run at from a rail through a series resistor. Compute the resistor value and the power it dissipates. Choose a standard resistor value ( your computed value) and state the resulting current. (5)
(b) A silicon solar cell delivers a short-circuit current and open-circuit voltage . Its maximum-power point is at , . Calculate the fill factor and the maximum output power. (4)
(c) Explain why a photodiode is normally operated in reverse bias for light-sensing applications, whereas a solar cell operates in forward-voltage (photovoltaic) mode. (2)
Question 5 — Diode Logic & Datasheet Reasoning (10 marks)
(a) A two-input diode AND gate uses two diodes with anodes tied to inputs A and B and cathodes joined to output , with a pull-up resistor from to . Using , complete a truth table of output voltages (not just logic levels) for all four input combinations where a logic-0 input = and a logic-1 input = . (5)
(b) Explain one reason diode logic cannot be cascaded through many stages, referencing the level degradation you observed in (a). (2)
(c) A varactor diode has a junction capacitance given by with . Compute at and , and state the tuning ratio. (3)
END OF PAPER
Answer keyMark scheme & solutions
Question 1 (14 marks)
(a) Peak secondary voltage . Bridge has two diodes conducting in series each half-cycle, so . (3) (1 mark , 1 for subtracting 2 drops, 1 answer)
(b) Ripple frequency for a full-wave/bridge rectifier is mains = (both half-cycles produce output pulses). (1 justify) (2 formula rearrange, 2 answer)
(c) Half-wave: ripple frequency = (only one pulse per cycle), so with same : This is double the target ripple — the half-wave design fails the spec and would need twice the capacitance. Full-wave charges the cap twice as often, halving ripple for the same ; hence the better choice. (2 calc, 2 comment)
(d) For a bridge, each diode sees a maximum reverse voltage of one peak = (≈ , since two diodes share the reverse blocking but each blocks ). Minimum PIV rating ; choose with margin (e.g. 50 V). (2)
Question 2 (13 marks)
(a) Worst case for keeping the Zener in regulation is minimum input voltage (least available current) and maximum load current (most current diverted from Zener). At , , the Zener still needs . Total current through = . Choose (a smaller value gives more margin); take . (2 worst case, 2 formula, 2 answer)
(b) Max Zener power occurs at max input () and min load () — all current flows through the Zener. With : So a Zener rated (with margin ~1 W) is required. (1 condition, 2 current, 2 power)
(If used: , — accept.)
(c) Any of: max power dissipation (must exceed 0.43 W); Zener dynamic impedance (affects regulation tightness); tolerance on . (2)
Question 3 (12 marks)
(a) Diode conducts when would exceed , clamping the top. Output = input for , and clipped flat at for the portion where . Negative half-cycle (down to ) passes unaltered. This is a positive clipper (limiter) at . (4)
(b) With silicon diode the branch conducts only when node voltage . New clipping level ; the forward drop raises the clamp point. (3)
(c) Clamper (cathode to ground, ideal): the diode conducts on the positive peaks, charging the capacitor so the output cannot exceed . The waveform is shifted down so its peak sits at .
- Peak:
- Trough:
- DC level (average): . (2 peak/trough logic, 2 values, 1 DC level)
Question 4 (11 marks)
(a) Standard is . Resulting current . Power in resistor (or using computed mA: ). (2 R, 1 std value, 1 current, 1 power)
(b) Fill factor Max power . (2 FF, 2 Pmax)
(c) Reverse bias widens the depletion region → lower junction capacitance (faster response) and gives a linear, wide photocurrent-vs-illumination response with fast switching for sensing. A solar cell must deliver power, so it operates in the fourth quadrant (forward voltage, reverse current), the photovoltaic mode. (2)
Question 5 (10 marks)
(a) With pull-up to : any input at pulls down via its diode to . Only when both inputs are do both diodes turn off and is pulled to .
| A (V) | B (V) | Y (V) |
|---|---|---|
| 0 | 0 | 0.7 |
| 0 | 5 | 0.7 |
| 5 | 0 | 0.7 |
| 5 | 5 | 5.0 |
This is an AND gate (Y high only when A AND B high). (4 table, 1 identify)
(b) Each diode adds a offset (logic-0 is , not ; logic-1 loses a drop in OR-type stages). Cascading accumulates these offsets, so after several stages the "0" and "1" levels drift toward each other and the logic margin collapses. Diode logic also cannot restore/amplify levels. (2)
(c) At : . At : . Tuning ratio . (1 + 1 + 1)
[
{"claim":"Bridge peak load voltage = 12*sqrt(2) - 1.4 = 15.57 V","code":"vpk=12*sqrt(2)-2*Rational(7,10); result=abs(float(vpk)-15.57)<0.02"},
{"claim":"Smoothing C for full-wave = 5000 uF","code":"C=Rational(25,100)/(100*Rational(5,10)); result=abs(float(C)-0.005)<1e-9"},
{"claim":"Half-wave ripple with same C = 1.0 V","code":"Vr=Rational(25,100)/(50*Rational(5,1000)); result=abs(float(Vr)-1.0)<1e-9"},
{"claim":"Rs worst case = 86.67 ohm","code":"Rs=(9-Rational(51,10))/(Rational(45,1000)); result=abs(float(Rs)-86.6667)<0.01"},
{"claim":"Max Zener power with Rs=82 is ~0.429 W","code":"Iz=(12-Rational(51,10))/82; Pz=Rational(51,10)*Iz; result=abs(float(Pz)-0.4293)<0.005"},
{"claim":"Solar fill factor = 0.743","code":"FF=(Rational(47,100)*Rational(11,100))/(Rational(58,100)*Rational(12,100)); result=abs(float(FF)-0.743)<0.005"},
{"claim":"Varactor Cj at 6V = 25.86 pF, ratio 3.09","code":"Cj=80/sqrt(1+Rational(6,1)/Rational(7,10)); ratio=80/Cj; result=abs(float(Cj)-25.86)<0.1 and abs(float(ratio)-3.094)<0.02"}
]