Interleaved — Phase 1

Coding interleaved practice

printable — key stays hidden on paper

Instructions: Solve each problem. These deliberately mix number systems, Boolean logic, digital hardware, and Python. Before solving, decide which concept applies — the mixing is the point. Show working. Total: 40 marks.

1. Convert the binary number $10110110_2$ to (a) decimal and (b) hexadecimal. (4 marks)

2. Evaluate the following Python expression and give its value and its type: 17 // 5 + 17 % 5 (3 marks)

3. Draw the truth table for a half adder (inputs $A$ , $B$ ; outputs Sum and Carry). State which logic gates produce each output. (4 marks)

4. Given s = "COMPUTER", write the output of each: (a) s[2] (b) s[-1] (c) s[1:4] (d) s[::2] (4 marks)

5. Simplify the Boolean expression $\overline{A} \cdot B + A \cdot B$ to a single variable, and state the name of the gate whose output equals $A \oplus B$ (XOR) when... explain why XOR is not the same as your simplified result. (4 marks)

6. Evaluate the Python expression 5 & 3 and 5 | 3 and 5 ^ 3. Show the binary working for each. (3 marks)

7. Order these storage locations from fastest to slowest access, and state one reason for the speed/size trade-off: RAM, L1 cache, HDD, CPU register, SSD, L2 cache (4 marks)

8. What does the following print, and why? Explain the short-circuit behaviour:

x = 0
print(x != 0 and (10 // x) > 1)

(3 marks)

9. Convert the octal number $57_8$ to decimal, then to binary. Explain in one sentence why programmers use octal/hex instead of raw binary. (4 marks)

10. State the three phases of the fetch–decode–execute cycle in order, and name which CPU component performs arithmetic during "execute". Then explain in one sentence how a D flip-flop differs from an SR flip-flop in storing one bit. (7 marks)

Answer keyMark scheme & solutions

1. (Subtopic 1.1.1 + 1.1.2 — binary→decimal→hex) (a) $10110110_2 = 128+0+32+16+0+4+2+0 = 182$ . (b) Group into nibbles: $1011\;0110 = B\;6 = \mathbf{0xB6}$ . Why: Number-system conversion; nibble-grouping is the efficient route to hex.

2. (Subtopic 1.2.6 — floor div & modulo) 17 // 5 = 3, 17 % 5 = 2, sum = 5. Type: int (int op int → int). Why: Tests distinguishing // (quotient) from % (remainder).

3. (Subtopic 1.1.6 — combinational logic)

A	B	Sum	Carry
0	0	0	0
0	1	1	0
1	0	1	0
1	1	0	1

Sum $= A \oplus B$ (XOR gate); Carry $= A \cdot B$ (AND gate). Why: Recognising the half-adder pattern, not a plain truth table.

4. (Subtopic 1.2.11 — indexing/slicing) s = "COMPUTER" (indices 0–7) (a) s[2] → 'M' (b) s[-1] → 'R' (c) s[1:4] → 'OMP' (indices 1,2,3; stop excluded) (d) s[::2] → 'CMUE' (indices 0,2,4,6) Why: Distinguishing single index vs slice vs step.

5. (Subtopic 1.1.3 — Boolean algebra) $\overline{A}B + AB = B(\overline{A}+A) = B(1) = \mathbf{B}$ . XOR: $A\oplus B = \overline{A}B + A\overline{B}$ , which is 1 only when inputs differ. Our expression simplified to $B$ , which ignores $A$ entirely — completely different behaviour. The trap: both start with " $\overline{A}B + \ldots$ ", but the second term differs ( $AB$ vs $A\overline{B}$ ). Why: Forces careful application of the distributive law and comparison to the XOR canonical form.

6. (Subtopic 1.2.9 — bitwise ops) $5 = 101_2$ , $3 = 011_2$ .

5 & 3: $101 \wedge 011 = 001 = \mathbf{1}$
5 | 3: $101 \vee 011 = 111 = \mathbf{7}$
5 ^ 3: $101 \oplus 011 = 110 = \mathbf{6}$ Why: Bit-by-bit logic, not logical and/or.

7. (Subtopic 1.1.9 — memory hierarchy) Fastest → slowest: CPU register → L1 cache → L2 cache → RAM → SSD → HDD. Trade-off: faster memory (registers/cache built from SRAM, on-die) is far more expensive per bit and physically smaller; slower storage (HDD, magnetic) is cheap and huge. Speed inversely relates to capacity/cost. Why: Tests the hierarchy ordering distinct from bitwise/number questions.

8. (Subtopic 1.2.8 — short-circuit) Prints False. x != 0 is False; and short-circuits, so (10 // x) is never evaluated — this avoids a ZeroDivisionError. Python returns the first falsy operand. Why: Recognising short-circuit as a guard pattern.

9. (Subtopic 1.1.2 — octal) $57_8 = 5\times8 + 7 = 40+7 = \mathbf{47}$ . Binary: each octal digit → 3 bits: $5=101$ , $7=111$ → $\mathbf{101111_2}$ . Why octal/hex: they map cleanly to bit-groups (3 bits/octal digit, 4 bits/hex digit), making long binary strings compact and human-readable. Why: Octal conversion + rationale, contrasted with earlier binary/hex items.

10. (Subtopics 1.1.11, 1.1.10, 1.1.7 — cycle, CPU, flip-flops) Cycle: Fetch (get instruction from memory using PC) → Decode (control unit interprets it) → Execute (perform the operation). Arithmetic during execute is done by the ALU (Arithmetic Logic Unit). D vs SR flip-flop: An SR flip-flop has separate Set/Reset inputs and an invalid state when S=R=1; a D flip-flop has a single data input D (with $R = \overline{S}$ internally), so it simply stores whatever D is on the clock edge — no invalid state. Why: Bundles CPU control flow with hardware storage element distinction.

[
  {"claim":"182 = 0xB6 and equals binary 10110110","code":"result = (int('10110110',2)==182) and (182==0xB6)"},
  {"claim":"17//5 + 17%5 == 5","code":"result = (17//5 + 17%5)==5"},
  {"claim":"5&3==1, 5|3==7, 5^3==6","code":"result = (5&3==1) and (5|3==7) and (5**0*(5^3)==6)"},
  {"claim":"octal 57 == decimal 47 == binary 101111","code":"result = (int('57',8)==47) and (int('101111',2)==47)"}
]