Embedded Systems & Real-Time Software

Question 1 (10)

(a) Nyquist: sampling rate must be strictly greater than twice the highest frequency component: $f_s > 2 f_{max}$. Here $f_{max}=4\text{ kHz}$, so minimum $f_s > 8\text{ kHz}$. (1 criterion, 1 value)

(b) LSB voltage = $V_{ref}/2^N = 3.3 / 2^{12} = 3.3/4096 \approx 8.056\times10^{-4}\text{ V} = 0.806\text{ mV}$. (2) Quantisation error bound $= \pm \tfrac12 \text{LSB} \approx \pm 0.403\text{ mV}$. (1)

(c) Nyquist frequency of $f_s=10\text{ kHz}$ is $f_s/2 = 5\text{ kHz}$. (1) A $7\text{ kHz}$ tone is above Nyquist; without filtering it aliases to $|f_s - f| = |10-7| = 3\text{ kHz}$, appearing as a false in-band tone. (2 — reasoning + value)

(d) Averaging $M$ oversampled samples reduces quantisation noise; effective resolution gain is $\tfrac12\log_2 M$ bits, i.e. 1 extra bit per 4× oversampling (equivalently ~3 dB SNR per octave / 6 dB per bit). (2)

Question 2 (12)

(a) Lower ID = higher priority. Dominant bit = 0, recessive = 1; a node sending recessive but reading dominant loses.

• A=0x1A3 = 100 1010 0011, B=0x1A0 = 100 1010 0000, C=0x0F7 = 000 1111 0111.
• Bit 10 (MSB): A=1, B=1, C=0 → C dominant, A and B lose here. C wins. (rule 2, bitwise trace 2, winner 1)

(b) Bit time $= 1/500{,}000 = 2\ \mu s = 2000\text{ ns}$. (2) One-way propagation $= 40\text{ m}\times5\text{ ns/m}=200\text{ ns}$; round trip $=400\text{ ns}$, well within the $2000\text{ ns}$ bit time (arbitration needs the bit to settle bus-wide within one bit) → feasible. (2)

(c) Any two of: bit stuffing, CRC (15-bit), frame check, ACK slot, form check. (2) Aerospace/automotive favour: deterministic priority arbitration (non-destructive), strong multi-layer error detection, automatic retransmission, multi-master robustness. (1)

Question 3 (12)

(a)

xTaskCreate(vWorker, "worker", 256, NULL, 3, NULL);
void vWorker(void *pv){ for(;;){ /* body */ } }

(call correct 2, skeleton with infinite loop 2)

(b)

SemaphoreHandle_t sem;   // xSemaphoreCreateBinary()
void ADC_IRQHandler(void){
  BaseType_t hp = pdFALSE;
  xSemaphoreGiveFromISR(sem, &hp);
  portYIELD_FROM_ISR(hp);
}
void vWorker(void *pv){
  for(;;){ if(xSemaphoreTake(sem, portMAX_DELAY)==pdTRUE){ /* process */ } }
}

(FromISR give 2, portYIELD_FROM_ISR 1, blocking Take with portMAX_DELAY 2)

(c) A semaphore/queue lets the task block (0% CPU while idle) and gives deterministic wakeup + priority-correct scheduling, avoiding busy-wait CPU waste, lost updates and race conditions of an unsynchronised flag; queues also carry data safely across the ISR/task boundary. (3)

Question 4 (10)

(a) Priority inversion: a high-priority task is blocked waiting on a resource held by a lower-priority task. (2) Sequence: L takes mutex → H preempts, tries to take mutex, blocks → M (higher than L, no mutex need) preempts L and runs indefinitely → L never runs to release, so H is blocked for an unbounded time driven by M. (3)

(b) Priority inheritance: while H is blocked on the mutex held by L, L is temporarily raised to H's priority, so M cannot preempt L; L finishes and releases quickly, bounding H's blocking to L's critical-section length. (3)

(c) Priority ceiling assigns each mutex a ceiling = max priority of any task that may lock it and enforces it on acquire (prevents deadlock, bounds blocking to one critical section); inheritance only boosts on actual contention. (2)

Question 5 (10)

(a) $U = 5/20 + 10/40 + 20/80 = 0.25+0.25+0.25 = 0.75$. (3)

(b) LL bound: $U_{bound}=n(2^{1/n}-1)$. For $n=3$: $3(2^{1/3}-1)\approx 3(0.2599)=0.7798$. Since $0.75 \le 0.7798$, the sufficient test passes (schedulable under RMS). (4) (Note: the paper's premise "fails" is a trap — correct answer states it actually passes; award full marks for the correct computed comparison.)

(c) RTA computes each task's worst-case response time $R_i = C_i + \sum_{j\in hp(i)}\lceil R_i/T_j\rceil C_j$ iteratively and checks $R_i \le T_i$ — exact, not just sufficient. (2) WCET must include cache/pipeline effects, interrupt/blocking, worst path — not just the observed value of one stopwatch run, which may miss the worst execution path. (1)

Question 6 (6)

(a) Three identical modules process the same input; a majority voter outputs the value agreed by ≥2. (1) Boolean 2-of-3: $V = ab + bc + ca$. (2)

(b) Fail-safe: on fault the system moves to a known safe state (e.g. train brakes engage / thrust cut). Fail-operational: system continues to function despite fault (e.g. redundant flight control keeps aircraft controllable). (3)

[
{"claim":"12-bit LSB voltage = 3.3/4096","code":"lsb = Rational(33,10)/4096; result = abs(float(lsb)-0.00080566)<1e-6"},
{"claim":"7kHz tone aliases to 3kHz at fs=10kHz","code":"fs=10; f=7; alias=abs(fs-f); result = alias==3"},
{"claim":"Total utilisation U = 0.75","code":"U=Rational(5,20)+Rational(10,40)+Rational(20,80); result = U==Rational(3,4)"},
{"claim":"LL bound n=3 ~0.7798 and U<=bound","code":"import sympy as sp; b=3*(2**sp.Rational(1,3)-1); result = (sp.Rational(3,4) <= b) and abs(float(b)-0.779763)<1e-4"},
{"claim":"CAN 500kbit/s bit time = 2us","code":"bt=1/sp.Integer(500000); result = bt==sp.Rational(1,500000) and abs(float(bt)-2e-6)<1e-12"},
{"claim":"2-of-3 majority voter truth: ab+bc+ca equals majority","code":"from sympy.logic.boolalg import And,Or; from sympy import symbols; a,b,c=symbols('a b c'); expr=Or(And(a,b),And(b,c),And(c,a)); vals={(0,0,0):False,(1,1,0):True,(1,0,0):False,(1,1,1):True}; result = all(bool(expr.subs({a:x,b:y,c:z}))==v for (x,y,z),v in vals.items())"}
]