Fault tree analysis (FTA) — top-down, AND - OR gates: Question bank

3.6.30 · D5 · Physics › Spacecraft Structures & Systems Engineering › Fault tree analysis (FTA) — top-down, AND - OR gates

Shuru karne se pehle, teen cheezein jo hum har jagah use karte hain.

Neeche ki tasveer woh do gates dikhati hai jo saara kaam karte hain — har ek ki shape yaad karo, sirf letters nahi.

Figure — Fault tree analysis (FTA) — top-down, AND - OR gates

Left panel dekho: ek OR gate apna output tab light karta hai jab koi bhi input light ON ho — toh uska output kam se kam sabse bright input jaisa bright hai (risk badhta hai). Right panel ek AND gate hai: uska output tabhi light hota hai jab har input ON ho — toh jab tak sab fail na ho tab tak dark rehta hai (risk kam hota hai). Agle har sawaal ke liye yeh do-panel image apne dimaag mein rakho.

Ab dekho kyun AND formula ek product hai — do mein se simpler derivation:

Ek AND gate tabhi fire karta hai jab har input ek saath fail ho. Do independent inputs ke liye, ek unit square socho: input $A$ width ke $P_{A}$ fraction par fail hota hai, input $B$ height ke $P_{B}$ fraction par fail hota hai, aur "dono fail" woh shaded rectangle hai jahan woh strips overlap karti hain — uska area $P_{A} \times P_{B}$ hai. Independence hi exactly woh cheez hai jo humein yahan width ko height se multiply karne deti hai. Zyada inputs stack karne se 1 se neeche ke aur fractions multiply hote hain, toh $P_{out} = \prod_{i = 1}^{n} P_{i}$ aur bhi shrink hota rehta hai — yeh redundancy ki mathematical shakal hai.

Ab OR formula — kyun yeh subtraction hai, addition nahi. Yahi ek derivation hai jis par yeh saara page tika hai:

Left se right padhte hue: hum chahte hain "kam se kam ek input fail ho." Isko seedha count karna matlab cases add karo phir double-counted overlaps hataao — tedha kaam. Toh hum sawaal ko uske opposite mein flip karte hain, "har input survive kare," jo (independent inputs ke liye) ek saaf product hai $\prod_{i} (1 - P_{i})$ (har bar ek survival hai, stack hua). Bachi hui jo bhi probability hai woh failure hai, toh $P_{out} = 1 - \prod_{i} (1 - P_{i})$ . Right par shaded sliver exactly wahi bachi hui cheez hai.

True or false — justify karo

Ek AND gate hamesha top event ko kisi bhi ek neeche wale input se kam likely banata hai.

Independent inputs ke liye True — 1 se neeche ki do numbers multiply karne par kuch milta hai jo dono se bhi chota ho, toh redundancy risk ko shrink karti hai. Yeh fail ho sakta hai agar inputs ek common cause share karein, jahan "AND" ek single event ki taraf collapse ho jaata hai.

Ek OR gate output probability bas uske input probabilities ka sum hoti hai.

False — summing se woh overlap overcount ho jaata hai jahan kai inputs ek saath fail hote hain aur result 1 se bhi zyada ho sakta hai. Sahi rule hai

1 - \prod_{i} (1 - P_{i})

, jo sum ko sirf tab approximate karta hai jab har

P_{i}

bahut chhota ho.

Agar har basic event probability 0.01 se neeche hai, toh top event bhi 0.01 se neeche hona chahiye.

False — ek wide OR gate kai chhote risks stack karta hai, toh 0.01 ke das inputs se roughly 0.096 milta hai, lagbhag das guna bada. OR gates risk badhate hain; sirf AND gates shrinkage guarantee karte hain.

Ek pure fault tree mein jahan saare AND inputs independent hain, zyada AND inputs add karna kabhi top event probability nahi badha sakta.

Us mathematical framework ke andar True — har extra factor

P_{i} < 1

product

\prod_{i} P_{i}

ko sirf shrink karta hai. "Independent" ka premise saara kaam kar raha hai; isko hatao aur guarantee gone (next item dekho).

Ek real spacecraft mein, zyada redundant units add karna (zyada AND inputs) kabhi top event probability nahi badha sakta.

False — yeh pure-math framework se bahar jaata hai: extra units mass, wiring, aur shared power add karte hain jo common cause failures introduce karte hain, ek OR-type vulnerability jo independence math ne kabhi model nahi ki. Paper par AND inputs help karte hain; hardware mein ek shared cause chupke chupke hurt kar sakta hai. Common Cause Failure Analysis dekho.

Ek fault tree aur ek reliability block diagram fundamentally alag systems describe karte hain.

False — woh ek hi system ko opposite viewpoints se describe karte hain: FTA failure ke paths model karta hai, ek RBD success ke paths model karta hai. Ek series block ek OR gate ke barabar hai; ek parallel block ek AND gate ke barabar hai.

Top event tree ko basic components se build karne ke baad choose kiya jaata hai.

False — FTA top-down hai: tumhe pehle dara hua top event naam karna hai, phir neeche ki taraf deduce karna hai. Baad mein choose karna bottom-up hoga, jo FMEA karta hai.

Normal redundancy model karne ke liye ek inhibit (NOT) gate zaroori hai.

False — plain AND aur OR gates redundancy aur single points of failure cover karte hain. Ek inhibit gate apna input tabhi pass karta hai jab ek alag condition hold kare (truth function: output ON iff input ON AND condition present); yeh guarded faults ke liye aata hai jaise "leak tabhi fire cause karta hai jab ek ignition source present ho," aur coherent trees mein rare hai — trees jo sirf AND/OR gates se built hain jahan ek failure add karna kabhi top event repair nahi kar sakta (zyada tooti cheezein system ko kabhi healthier nahi banaatein).

Galati dhundho

Neeche ki figure agle sawaal mein flawed model dikhati hai — isko study karo, phir trap padho.

"Dono transponders ek power regulator share karte hain, toh main unhe ek AND gate se

P_{out} = P_{A} P_{B}

ke saath model karta hoon, jahan

P_{A}, P_{B}

dono transponders ki failure probabilities hain."

Galati yeh hai ki ek common cause ko independent treat kiya gaya — shared regulator dono transponders ko ek saath fail karta hai, toh

P_{A} P_{B}

multiply karna (jo independence assume karta hai) risk ko underestimate karta hai. Regulator ko apne basic event ke roop mein bahar nikalo jo top par ek OR feed kare (figure ka right side), taaki uski failure akele dono paths ko neeche kar sake.

"Gyro hamaara basic event hai; uski probability wohi hai jo vendor sheet assembly ke liye list karti hai."

Galati yeh hai ki agar bearing wear, electronics, aur power feeds ki apni known rates hain toh bahut jaldi ruk jaana galat hai. Tab tak decompose karo jab tak har leaf ki ek measurable failure rate apne data resolution se match kare.

"Solar power fail hoti hai agar tracking fail ho AND deployment fail ho, toh yeh safe hai."

Gate galat hai — koi bhi ek failure akele solar output ko khatam kar deti hai, toh yeh ek OR gate hona chahiye, AND nahi. Isko AND kehna jhootha redundancy advertise karta hai jo exist hi nahi karta.

"HGA ki probability 0.05 hai aur har transponder ki 0.01, toh main reliability money transponders par lagaunga kyunki woh do hain."

Galati yeh hai ki gate structure ignore kiya — transponders AND ke peeche baithte hain (unki joint failure 0.0001 hai), jabki HGA ek akela OR input hai jo risk dominate kar raha hai. Paisa HGA par jaana chahiye, jo single point of failure hai.

"Sunshield par har mechanism 0.999 reliable hai, toh deployment essentially certain hai."

Galati yeh hai ki ~100 mechanisms par OR gate bhuul gaye —

0.99 9^{107} \approx 0.90

ke saath, roughly 1-in-10 chance hai ki kuch jam jaaye. Bade OR fan-ins excellent individual reliability ko bhi erode kar dete hain.

"AND matlab dono events occur hone chahiye, aur 'dono' unlikely hai, toh AND gates hi dangerous hain."

Intuition reality ko invert kar raha hai — "dono fail hone chahiye" exactly wahi wajah hai AND gates safe kyun hain (redundant). OR gates, jahan koi bhi ek failure kaafi hai, dangerous ones hain.

Why questions

OR-gate formula complement

1 - \prod_{i} (1 - P_{i})

kyun use karta hai direct sum ki jagah?

Kyunki "kam se kam ek fail ho" ko seedha count karna awkward hai (tum cases add karte phir overlaps subtract karte) lekin uska opposite — "har input survive kare" — independent survivals ka ek saaf product hai. Isko 1 se subtract karna failure probability bina overcounting ke recover karta hai, exactly jaisa OR figure ne dikhaya.

Spacecraft designers deliberately kyun chahte hain ki AND gates tree mein upar hon?

Top ke paas ek AND gate matlab mission tab tak survive karta hai jab tak saare redundant paths ek saath na marein, chhoti probabilities ko ek bahut chhoti mein multiply karta hai. Yeh redundancy ka mathematical signature hai jo kaam kar raha hai.

FTA woh failure modes kyun miss kar sakta hai jo FMEA pakad leta hai?

FTA ek chosen top event se deductive hai, toh koi bhi failure jo us event se linked nahi woh tree ko kabhi dikhti nahi. FMEA har component ko bottom-up sweep karta hai, orphans pakadta hai jinke baare mein FTA kabhi nahi poochha — isliye dono saath use kiye jaate hain.

Hum ek gate ke andar single-event probabilities multiply kar hi kyun sakte hain?

Sirf isliye kyunki hum independence assume karte hain — ki ek input ki failure doosre ki failure ke baare mein koi information nahi deti. Alag probabilities ka multiplication exactly independence ka mathematical statement hai; jab yeh false ho toh numbers galat hain.

Ek bada probability wala single OR input often "risk dominate" kyun karta hai?

Ek OR gate mein sabse bada term

1 - \prod_{i} (1 - P_{i})

drive karta hai, toh, 0.05 wala ek weak link 0.001 ke darjan inputs ko dabaata hai. FTA exactly aise hi tumhara paisa asli weak spot par point karta hai.

Dependent events

P (A and B) = P_{A} P_{B}

kyun use nahi kar sakte?

Woh product independence assume karta hai; jab

A

aur

B

ek cause share karein, yeh jaanna ki

A

fail hua toh

B

ke fail hone ka chance badh jaata hai, toh true joint probability badi hai. Dependence ignore karna real risk hide karta hai. Common Cause Failure Analysis dekho.

Minimum cut set full tree se zyada useful kyun hai weaknesses dhundhne mein?

Ek minimum cut set basic events ka sabse chhota group hai jiska joint failure akele top event trigger karta hai — ek single-element cut set literally ek single point of failure hai. Yeh logic ko "woh kam se kam cheezein kya hain jo humein khatam kar sakti hain?" tak strip kar deta hai.

Edge cases

Ek AND gate ki top-event probability kya hai agar ek input ki probability exactly 0 ho?

Zero — product

\prod_{i} P_{i}

mein 0 ka ek factor hai, toh top event ho hi nahi sakta. Ek perfectly reliable redundant leg poore redundant set ko unfailing bana deta hai.

Ek OR gate ki top-event probability kya hai agar ek input ki probability exactly 0 ho?

Woh remaining inputs ke OR mein reduce ho jaata hai — survival factor

(1 - 0) = 1

product

\prod_{i} (1 - P_{i})

se harmlessly bahar nikal jaata hai, toh ek kabhi-na-failing input koi risk add nahi karta. Yeh AND-with-

P = 1

case ka mirror hai neeche.

AND-gate output kya hai agar ek input ki probability exactly 1 ho (guaranteed failure)?

Woh doosre input ki probability mein reduce ho jaata hai — two-input AND ke saath,

P_{out} = 1 \cdot P_{B} = P_{B}

, toh certain leg bahar nikal jaata hai aur gate poori tarah survivor par depend karta hai. Yeh OR-with-

P = 1

case ka mirror image hai neeche.

OR-gate output kya hai agar ek input ki probability exactly 1 ho (guaranteed failure)?

Exactly 1 — survival product

\prod_{i} (1 - P_{i})

mein

(1 - 1) = 0

ka ek factor hai, toh top event certain hai. Ek guaranteed failure ek OR gate ko haraata hai chahe baaki kitne bhi achhe kyun na hon.

Ek single-input AND gate kismein reduce ho jaata hai?

Woh us input ki apni probability mein reduce ho jaata hai — ek factor ke saath,

\prod_{i} P_{i} = P_{1}

, toh kuch multiply nahi hota aur gate bas

P_{1}

ko unchanged pass karta hai. Gate ko kam se kam do inputs chahiye pehle AND aur OR alag behave karein.

Agar do OR inputs perfectly correlated hain (hamesha saath fail hote hain), toh true output probability kya hai?

Woh ek single input ki probability

P

ke barabar hai,

1 - (1 - P)^{2}

nahi — perfect correlation matlab woh effectively ek event hain. Independence formula yahan risk overstate karta, AND common-cause trap ka mirror image.

Jab har basic event probability 0 ki taraf approach kare, toh OR-gate formula kya approach karta hai?

Woh plain sum

\sum_{i} P_{i}

approach karta hai, kyunki product mein cross-terms negligible ho jaate hain (

1 - \prod_{i} (1 - P_{i}) \approx \sum_{i} P_{i}

). Yeh "rare-event" approximation hai, valid sirf tab jab har

P_{i}

chhota ho.

Recall Ek-line survival kit

AND multiply karta hai → shrinks → redundancy (achha). OR complement-products karta hai → grows → single points of failure (bura). Dono rules independence assume karte hain — shared causes unhe tod dete hain, toh unhe pehle dhundho.