6.5.14
Intuition Ek-sentence ideaNeuromorphic computing aise hardware banata hai jo brain ki nakal karta hai : memory aur processing ko alag rakhne (von Neumann) ki jagah, ye spiking neurons aur synapses ka network use karta hai jo compute aur store ek hi jagah karte hain, aur sirf tab sparse electrical "spikes" se communicate karte hain jab kuch kehna ho.
Intuition Woh problem jo ye solve karta hai — von Neumann bottleneckEk normal CPU memory (RAM) aur compute (ALU) ko alag boxes mein rakhta hai. Har operation data ko ek bus ke upar aage-peechhe shuttle karta hai. Bus bottleneck ban jaati hai: zyaadatar energy aur time data move karne mein jaata hai, compute karne mein nahi.
Brain mein ye problem nahi hai. Ye ~20 watts par run karta hai, roughly ek dim light bulb, phir bhi perception aur reasoning karta hai jisse bade GPU clusters bhi struggle karte hain. YE ITNA EFFICIENT KYUN HAI?
Co-located memory + compute — synapses weight store karte hain aur multiply bhi karte hain.Event-driven / sparse — neurons tab tak silent rehte hain jab tak spike fire na karo; idle units par koi clock tick waste nahi.Massive parallelism — ~1 0 11 1 0 14
Neuromorphic hardware in teeno tricks ko silicon mein copy karta hai.
Definition Neuromorphic computingEk hardware paradigm jo Spiking Neural Networks (SNNs) ko physical circuits mein implement karta hai, jahan computation discrete spikes (events) se time mein drive hoti hai, aur jahan synaptic weights locally compute ke paas stored hote hain. Communication typically event-driven hoti hai; ek common (lekin universal nahi) encoding Address-Event Representation (AER) protocol hai, jise kaafi saare lekin sab neuromorphic systems use nahi karte.
Definition Spiking neuronEk unit jo incoming weighted spikes ko ek membrane potential V ( t ) V V t h cross karta hai, to ye ek spike emit karta hai aur reset== ho jaata hai. Information spikes ki timing aur rate mein hoti hai, na ki har cycle par continuous numbers mein.
Feature
von Neumann (CPU/GPU)
Neuromorphic
Memory & compute
Alag, beech mein bus
Co-located
Activity
Clocked, hamesha on
Event-driven (sparse)
Data
Dense floats
Sparse spikes
Encoding
Register mein value
Timing / rate of spikes
Energy
High (data movement)
Bahut low
Workhorse hai Leaky Integrate-and-Fire (LIF) neuron. Ise physics se banate hain, memorize nahi karte.
Intuition Hebb's rule, sharpen kiya hua"Neurons jo saath fire karte hain, saath wire hote hain." Neuromorphic chips ek timing-sensitive version implement karte hain: Spike-Timing-Dependent Plasticity (STDP) .
Agar pre -synaptic spike post spike se thoda pehle aata hai (usne help ki thi) → strengthen karo (potentiation , Δ w > 0
Agar pre post ke baad aata hai (wo cause nahi kar sakta tha) → weaken karo (depression , Δ w < 0
Worked example Example 1 — Kya ye neuron fire karega?R = 10 M Ω C = 1 nF V t h = 15 mV I = 2 nA
Step A — steady-state voltage R I KYUN? Agar V V t h R I = ( 10 × 1 0 6 ) ( 2 × 1 0 − 9 ) = 20 × 1 0 − 3 = 20 mV 20 mV > 15 mV = V t h ye fire karega. ✅
Step B — membrane time constant. KYUN? Speed set karta hai. τ m = R C = ( 1 0 7 ) ( 1 0 − 9 ) = 0.01 s = 10 ms
Step C — time to first spike. KYUN? Derived formula use karo.
T = τ m ln R I − V t h R I = 10 ms ⋅ ln 20 − 15 20 = 10 ms ⋅ ln 4 ≈ 13.9 ms Firing rate ≈ 1/13.9 ms ≈ 72 Hz
Worked example Example 2 — Threshold ke neeche, koi spike nahiWahi neuron lekin I = 1 nA Pehle R I R I = 10 mV < 15 mV 10 − 15 10 undefined → neuron kabhi fire nahi karta. Ye bas 10 mV
Worked example Example 3 — STDP directionPre-synaptic spike t = 5 ms t = 8 ms Δ t Δ t = t p os t − t p r e = 8 − 5 = + 3 ms > 0 potentiation . A + = 0.1 , τ + = 20 ms Δ w = 0.1 e − 3/20 = 0.1 × 0.861 = + 0.086
Common mistake "Neuromorphic = deep learning ke liye sirf ek faster GPU."Kyun sahi lagta hai: Dono neural nets run karte hain, dono AI accelerate karte hain. Fix: GPUs dense synchronous matrix math karte hain; neuromorphic asynchronous, event-driven hai, aur sirf active spikes par energy kharach karta hai. Iska fayda hai sparse, temporal data par inference per energy , raw dense throughput nahi.
Common mistake "Ek spiking neuron sirf ReLU ki tarah ek number output karta hai."Kyun sahi lagta hai: ML mein, neuron = weighted sum + activation. Fix: Ek spiking neuron time mein ek dynamical system hai; information mein when spikes hote hain (temporal code), aur iski state (V
Common mistake "Zyaada input current ka matlab hamesha fire karna hai."Kyun sahi lagta hai: Zyaada current → zyaada charge. Fix: Agar R I ≤ V t h kabhi threshold cross nahi karta (Example 2). Steady-state leak threshold ke neeche input ko balance kar leta hai. Hamesha pehle R I V t h
Common mistake "STDP ko backprop ki tarah global error chahiye."Kyun sahi lagta hai: Learning ko "zaroor" ek loss signal chahiye. Fix: STDP local hai — ek synapse sirf apni khud ki pre/post spike times (Δ t
IBM TrueNorth — 1M neurons, 256M synapses, ~70 mW ; fully digital, event-driven.Intel Loihi / Loihi 2 — on-chip learning (programmable STDP) , asynchronous cores.SpiNNaker (Manchester) — kaafi saare ARM cores jo AER messaging ke saath spikes simulate karte hain.Memristor crossbars — multiply-accumulate analog mein, in-memory karte hain (Ohm's law multiply karta hai, Kirchhoff's law sum karta hai). Ye co-located memory+compute ka physical embodiment hai.
Neuromorphic computing kaunsa bottleneck attack karta hai? Von Neumann bottleneck — energy/time waste hoti hai data ko alag memory aur compute ke beech move karne mein.
Teen brain tricks ke naam batao jo neuromorphic hardware copy karta hai. Co-located memory+compute, event-driven sparsity, massive parallelism.
Human brain mein roughly kitne neurons aur synapses hain? ~1 0 11 1 0 14
LIF membrane equation likho. τ m d V / d t = − V + R I ( t ) τ m = R C
LIF neuron ko "leaky" KYUN kehte hain? Bina input ke, V ˙ = − V / τ m V
Constant current ke under time-to-first-spike ka formula. T = τ m ln R I − V t h R I
LIF neuron kabhi fire kab nahi karta? Jab steady-state voltage R I ≤ V t h
STDP kya hai? Spike-Timing-Dependent Plasticity: synapse strengthen hota hai agar pre post se pehle fire kare, weaken hota hai agar baad mein; magnitude ∣Δ t ∣
Sign convention: Δ t = t p os t − t p r e > 0 Pre before post → potentiation (weight badhta hai).
AER ka full form kya hai aur ye kya karta hai? Address-Event Representation: encode karta hai kaun sa neuron spike kiya aur kab, taaki sirf active events transmit hon. Ye ek common lekin universal neuromorphic protocol nahi hai.
Spike train mein kya encode hota hai (ML neuron ke comparison mein)? Information time ke saath discrete spikes ki timing/rate mein hoti hai, na ki ek single continuous value mein.
Memristor crossbars in-memory MAC kaise compute karte hain? Ohm's law current = conductance×voltage deta hai (multiply); Kirchhoff ek wire par currents sum karta hai (accumulate).
Do neuromorphic chips ke naam batao aur ek distinguishing feature. IBM TrueNorth (~70 mW, digital, event-driven); Intel Loihi (on-chip programmable STDP learning).
Recall Feynman: 12-saal ke bachche ko explain karoImagine karo ek class jahan bachche sirf tab haath uthate hain ("spike") jab unke paas sach mein kuch kehna hota hai, aur baaki time chup rehte hain — isse sabki energy bachti hai. Har bachcha dheere dheere "excitement se bharta hai" jab doost unhe whisper karte hain, aur jab kaafi bhar jaata hai, to chillata hai, phir shant ho jaata hai. Doost jo shout se thoda pehle whisper karte hain woh closer friends ban jaate hain (unka whisper zyaada matter karta tha). Ek normal computer mein har bachcha har clock tick par chillata hai aur saari answers ko teacher ke paas room ke us paar le jaata hai — bahut thhaka dene wala. Neuromorphic chips woh quiet, sirf-jab-zaroorat-ho classroom hai, aur isliye ye brain ki tarah power sip karte hain.
Mnemonic LIF story yaad rakho:"Leaky bucket fills, tips, empties."
Paani (current) andar aata hai, bucket leak karti hai (− V V t h tip karti hai (spike) aur empty ho jaati hai (reset). Aur STDP ke liye: "Pre-before-post = pump up; post-before-pre = pull down."
Von Neumann architecture — woh bottleneck jo neuromorphic escape karta hai.Memristors and ReRAM — analog in-memory synapses.Spiking Neural Networks (SNN) — woh computational model jo hardware par run hota hai.GPU vs Neuromorphic accelerators — dense vs event-driven compute.RC circuits — LIF membrane ke peechhe ki physics.Hebbian learning — STDP ki biological root.In-memory computing — storage aur compute ko co-locate karne ka broader trend.
data movement wastes energy
co-located memory + compute
Address-Event Representation
