6.5.12 · HinglishAdvanced & Emerging Architectures

Open hardware ecosystem (OpenRISC, OpenTitan)

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6.5.12 · Hardware › Advanced & Emerging Architectures


WHAT hai "open hardware"?

Teen cheezein har ek "open" ho sakti hain, aur log inhe confuse karte hain:

Layer Kya hai yeh Open example
ISA (Instruction Set Architecture) SW aur HW ke beech ka contract RISC-V, OpenRISC ORBIS
Microarchitecture / RTL actual gate-level implementation mor1kx, Ibex
Toolchain compiler, simulator, EDA flow GCC port, Verilator, OpenROAD

WHY open hardware matter karta hai? (80/20 core)

Char bade WHYs:

  1. Auditability — koi bhi backdoors/bugs dhundh sakta hai (Root of Trust ke liye crucial).
  2. Koi vendor lock-in nahi / koi per-unit royalties nahi — RTL reuse karna free hai.
  3. Longevity — design kisi bhi single company se zyada jeeta hai.
  4. Community fixes — bugs bahut saari aankhon dwara dhunde aur patch kiye jaate hain (hardware ke liye Linus's Law).

OpenRISC — early open CPU


OpenTitan — open Root of Trust

Figure — Open hardware ecosystem (OpenRISC, OpenTitan)

HOW pieces fit hote hain (mental model)

        OPEN ISA (spec)  ──▶  OPEN RTL (core)  ──▶  OPEN SoC (chip)
        RISC-V / ORBIS        Ibex / mor1kx        OpenTitan
                                    │
                              open toolchain
                          (GCC, Verilator, OpenROAD)

Flashcards

Teen independent layers kaunsi hain jo hardware mein har ek "open" ho sakti hain?
ISA (spec), microarchitecture/RTL (implementation), aur toolchain (compiler/EDA flow).
Kya open ISA matlab chip open hai?
Nahi — ek ISA sirf ek specification hai; tum ek fully proprietary core bana sakte ho jo open ISA implement kare (jaise ek closed RISC-V phone SoC).
Hardware Root of Trust kya hota hai?
Pehla component jo boot hota hai; yeh baad ke har stage ko measure aur verify karta hai, ek chain of trust banata hai jis par upar ki sab cheez depend karti hai.
Root of Trust ko auditable / open kyun hona chahiye?
Kyunki tum ek black box mein backdoor ki absence verify nahi kar sakte, aur uske upar ki sab cheez use implicitly trust karti hai.
OpenTitan kaunsa CPU core aur ISA use karta hai?
Ibex core, jo RISC-V ISA implement karta hai (OpenRISC nahi).
OpenRISC kya hai aur uska main ISA kya hai?
Ek early (~2000) open RISC CPU family; main ISA ORBIS32/64 hai, flagship core mor1kx.
Fixed 32-bit instruction width CPU ko kyun simplify karta hai?
Next-instruction address simply PC+4 hota hai bina kisi decoding ke, toh N instructions ke liye total code size = 4N bytes hota hai.
Secure boot mein sirf hash ki jagah signature kyun use karte hain?
Hash integrity deta hai lekin authenticity nahi; signature hash ko vendor ki private key se bind karta hai toh attacker image AUR hash dono replace nahi kar sakta.
SHA-256 collision dhundhna kitna mushkil hai, aur kyun?
Lagbhag attempts, birthday bound se (ek -bit hash ke liye ).
Silicon ke liye Kerckhoffs's principle bolo.
Security secret keys par depend karni chahiye, design ki secrecy par nahi.

Recall Feynman: ek 12-saal ke bachche ko explain karo

Root of Trust ek aisa security guard hai jo sabse pehle aata hai aur building unlock karta hai. Agar woh guard secretly ek chor hai, toh andar ke locks kitne bhi acche hon — poori building unsafe hai. Ab socho: kya tum aisa guard chahoge jiska training manual secret ho, ya aisa jiska manual publish ho taaki poora sheher check kar sake ki woh honest hai? Open hardware woh manual publish karta hai. Guard ke paas abhi bhi ek secret key hai jo koi copy nahi kar sakta (chip mein burn ki gayi hai), lekin design open hai taaki sab ensure kar sakein ki koi hidden trapdoor nahi hai. OpenTitan woh open guard-chip hai; OpenRISC ek early open brain (CPU) tha jisne dikhaya ki idea kaam kar sakta hai.

Connections

  • RISC-V ISA — woh ISA jo OpenTitan ka Ibex core implement karta hai
  • Secure Boot & Chain of Trust — upar wala hash-signature mechanism
  • Cryptographic Hash Functions — collision resistance aur birthday bound
  • Digital Signatures — authenticity vs integrity
  • One-Time-Programmable Fuses (eFuse) — jahan root key rehti hai
  • Kerckhoffs's Principle — keys se security, obscurity se nahi
  • FPGA & RTL Verification — Verilator/formal methods jo Ibex par use hoti hain

Concept Map

releases

spans three layers

spans three layers

spans three layers

spec only, not silicon

early open

core mor1kx uses

open at all layers

implements

requires

enabled by

security not by secrecy

Open Hardware

RTL design source

ISA layer

Microarch RTL

Toolchain

OpenRISC

OpenTitan

RISC fixed-width

Root of Trust

Auditability

Kerckhoffs principle