6.5.8 · D2 · HinglishAdvanced & Emerging Architectures

Visual walkthroughNeural processing units (NPUs)

2,544 words12 min read↑ Read in English

6.5.8 · D2 · Hardware › Advanced & Emerging Architectures › Neural processing units (NPUs)


Step 1 — Do number lists, ek answer

KYA HAI. Matrices bhool jao. Sabse chhote possible neural-network idea se shuru karo: ek output neuron. Uske paas ek inputs ki list hai (unhe kaho) aur ek weights ki list hai (unhe kaho). Neuron ka kaam hai in do lists se ek number produce karna.

YEH OPERATION KYUN. Ek neuron poochta hai "har input kitna matter karta hai?" — woh har input ko uske weight se scale karta hai aur votes add karta hai. Woh "scale-and-add-up" hi neural computing mein sabse zyada repeat hone wala kaam hai, isliye yahi woh cheez hai jise hume sasta banana hai.

PICTURE. Rangeen boxes ki do rows lined up hain. Har purple input box seedha neeche wale coral weight box se pair karti hai. Hum har pair ko multiply karte hain, phir har product ek bucket mein daalnge aur sum karte hain.

Figure — Neural processing units (NPUs)

  • ::: -vaan input number (purple). sirf ek counter hai, se tak.
  • ::: woh weight jo ke saath pair hai (coral) — uska "importance dial."
  • ::: kitne pairs hain (dono lists ki length).
  • ::: ek single output number, saare products ka sum.

Step 2 — Atomic move: multiply karo, phir running total mein add karo

KYA HAI. Dekho ki aap woh sum haath se actually kaise compute karte. Aap apne dimag mein ek running total rakhte ho. se shuru karo. Pehla pair multiply karo, usme add karo. Agla pair multiply karo, usme add karo. Repeat.

YEH ALAG KYUN KARO. Kyunki hardware sirf ek chhoti si cheez achhi bana sakta hai. Agar har dot product usi ek chhote kaam ki repetition hai — "do numbers multiply karo, result jo already hai usme add karo" — to hume sirf woh ek gadget banana hai, aur hajaaron copies banana hai.

PICTURE. Ek single box jis par MAC (Multiply-ACcumulate) likha hai. Do inputs enter karte hain ( aur ), ek running total pehle se aata hai, aur nikalta hai . Purana total replace ho jaata hai naye se.

Figure — Neural processing units (NPUs)


Step 3 — Ek saath bahut saare neurons = matrix multiply

KYA HAI. Ek neuron ek output deta hai. Ek layer mein bahut neurons hote hain, aur hum usually bahut inputs ek saath feed karte hain (ek batch). Input rows ko ek grid mein stack karo, weight columns ko ek grid mein stack karo. Har output ki row aur ke column ka dot product hai.

KYUN. Real networks kabhi ek dot product nahin karte — woh poora rectangle karte hain. Rectangle ko matrix multiply naam dene se hum ek clean formula mein total kaam count kar sakte hain (agla step) har neuron ko track karne ki bajay.

PICTURE. Baayein ek grid , upar ek grid , aur bottom-right mein answer grid . ke cell ko bharne ke liye, ki row ke saath slide karo aur ke column ke saath neeche jao, pairs ko MAC-ing karte hue.

Figure — Neural processing units (NPUs)

  • ::: row , position mein input (hum kaun sa pair hain).
  • ::: column , position mein weight.
  • ::: output row kaun si () — ek per batch item.
  • ::: output column kaun sa () — ek per neuron.
  • Andar wala exactly wahi dot product hai jo Step 1 mein tha.

Yahi woh hai jo parent note ne diya tha — ab har letter earned hai.


Step 4 — Kaam gino, aur asli dushman dhundho

KYA HAI. output cells mein se har ek cell ko MACs lagte hain (ek per pair). To total ek simple product hai.

KYUN. Hume jaanna hai ki yeh kitna bura hota hai, aur dard kahan rehta hai — arithmetic mein, ya memory se numbers fetch karne mein?

PICTURE. Do side-by-side bars. Lamba coral bar DRAM se ek number fetch karne ki energy hai ( pJ). Chhota mint bar multiply ki khud ki energy hai ( pJ). Fetch, math se ~ zyada hai.

Figure — Neural processing units (NPUs)

Step 5 — Reuse: har number ko bahut saare multiplies feed karne chahiye

KYA HAI. Step 3 se notice karo: ek akela weight har output row mein appear karta hai — woh baar use hota hai. Ek akela input har output column mein appear karta hai — baar use hota hai. Har number kai baar reusable hai.

KYUN. Agar ek number ek baar fetch kiya jaaye lekin baar multiply kiya jaaye, to crushing memory cost se divide ho jaati hai. Isi tarah hum Step 4 ki coral bar ko defeat karte hain — use cheaper banake nahin, balki use bahut kam baar pay karke.

PICTURE. Ek weight box still baith a hai. Ek arrow dikhata hai ki wahi same weight poori ek row of multiplies mein reuse ho raha hai, jabki fresh inputs uske paas se guzarte hain. "Load once, multiply many."

Figure — Neural processing units (NPUs)

Step 6 — MACs ko grid mein wire karo: systolic array

KYA HAI. Step 2 ka MAC gadget lo aur plane mein tile karo: MACs ki rows aur columns, har ek sirf apne neighbours se wired (right aur down — koi long wires nahin, koi global memory nahin). Har weight apne cell mein load karo aur wahan hold karo (weight-stationary). Ab inputs ko baayi taraf se stream karo, ek column of data per clock tick.

GRID KYUN, SIRF NEIGHBOURS KYUN. Ek grid se multiplies ek hi waqt hoti hain (parallelism, Step 4 ka ilaaj). Neighbour-only wiring ka matlab hai data door memory tak travel karne ki bajay ek chhota sa step hop karta hai per tick — sasta aur scalable. Yahi woh systolic array hai jise parent note ne naam diya tha.

PICTURE. Cells ki ek grid. Weights (coral) har cell ke andar baith e hain, fixed. Inputs (purple) left→right march karte hain. Partial sums (mint) top→bottom girte hain, har cell apna product girte total mein add karta hai. Dekho ek input diagonally poori grid sweep karta hai.

Figure — Neural processing units (NPUs)

Kyunki ek input, ek baar inject hone ke baad, cells ki poori row mein march karta hai, woh single fetch poori row of multiplies ko feed karta hai — reuse (Step 5) physically bana diya. Related ideas: Tensor cores, GPUs and SIMT.


Step 7 — Fill, drain, aur steady-state ki jeet

KYA HAI. Grid instant nahin hai. Data staggered enter karta hai (ek diagonal wavefront), to early cells kaam karte hain jabki baad ke cells abhi bhi khali wait kar rahe hain — pipeline fill. Ek baar full hone ke baad, array steady state mein hota hai: har clock pe results ka ek poora column finish hota hai. Ant mein, aakhiri data khaalee hote cells ke through drain ho jaata hai.

YEH KYUN DIKHAO. Kyunki honest speed busy cycles aur filling/draining cycles ke ratio par depend karti hai. Badi matrix ke liye fill negligible hai; chhoti matrix ke liye fill zyaadatar run hai aur array mostly idle hai. Yahi fark hai marketing TOPS aur real speed mein.

PICTURE. Teen snapshots side by side: fill (live cells ka diagonal, corners idle), steady state (poori grid live), drain (live diagonal exit kar raha hai, entry corner phir se idle). Busy fraction shaded area hai.

Figure — Neural processing units (NPUs)

  • ::: MAC cells ki rows aur columns.
  • ::: cycles per second (Hz).
  • woh ::: har MAC = ek multiply plus ek add = do operations.
  • Utilisation ::: cells ka woh fraction jo actually useful kaam kar raha hai — kabhi assume mat karo.

Step 8 — Degenerate cases jo miss nahin karne chahiye

KYA HAI AUR KYUN. Ek formula tab hi trusted hota hai jab uske edges check kiye jaayein. Har corner chalo:

Case Kya hota hai Kyun
Har output ke liye ek pair; accumulator ek single product add karta hai — koi chaining nahin. Length one ka dot product sirf ek multiply hai.
Layer array se chhoti () columns mein se sirf use hote hain → utilisation . Idle columns area burn karte hain lekin kaam nahin karte.
Chhota , badi grid Fill/drain dominate karta hai; steady state barely reach hoti hai. Rows itni nahin ki pipeline latency amortise ho sake.
Memory-bound layer PEs data ka wait karte hue bhookhe rahte hain; effective TOPS peak. Bandwidth, grid nahin, limit hai (Roofline model).
Zero inputs / zero weights MAC phir bhi run karta hai (); result correct, energy waste. Hardware zeros skip nahin karta jab tak specially build na ho.
int8 vs fp32 precision int8 multiplier ≈ chhota. Multiplier area (bit-width) → 16× zyada MACs per area.

PICTURE. Ek chhota array jisme sirf left ke do columns lit hain (ek narrow layer). Right par dark idle columns dikhate hain wasted silicon — utilisation .

Figure — Neural processing units (NPUs)

Ek-picture summary

Figure — Neural processing units (NPUs)

Ek canvas par poori derivation: do lists → ek dot product → ek MAC gadget → dot products ki ek matrix → memory tax → reuse → ek marching systolic grid → fill/steady/drain → peak aur utilisation.

Recall Feynman retelling — plain words mein wapas bolo

Ek neuron sirf har input ko ek dial se multiply karta hai aur votes add karta hai — yahi ek dot product hai. Aapke hardware ko ek hi trick chahiye: "do numbers multiply karo aur unhe ek running total mein add karo": ek chhota sa MAC cell. Poori layer in dot products ka ek rectangle hai — ek matrix multiply — aur woh billions of MACs hain. Lekin multiplying basically free hai; jo cheez maar daala hai woh hai numbers ko memory se fetch karna, jo ~1000× zyada cost karta hai. To winning idea hai reuse: har number ek baar fetch karo aur usse bahut saare multiplies se guzaaro. Isko physically karne ke liye hum ek plane ko MAC cells se tile karte hain jo sirf apne neighbours se wired hain, har cell mein ek weight freeze karte hain, aur inputs ko left-to-right march karne dete hain jabki partial sums top-to-bottom girte hain. Har input, ek baar inject hone ke baad, poori row sweep karta hai — ek fetch, bahut saare multiplies. Ek chhoti si fill ke baad grid har clock tick pe answers ka ek poora column finish karta hai. Uski top speed sirf (number of cells) × (clock) × 2 hai — lekin tabhi jab cells busy rahein, jo chhoti ya memory-starved layers kharaab kar deti hain. Aur kyunki chhote numbers ka multiplier kaafi chhota hota hai, int8 par jaane se ~16× zyada cells fit ho jaate hain — zyada math, kam energy, same silicon.