Processing-in-memory (PIM)

6.5.5 · Hardware › Advanced & Emerging Architectures

PIM exist kyun karta hai? (Woh problem jo yeh solve karta hai)

Energy ki kahani aur bhi buri hai. Chip ke across ek bit move karna, us par math karne se kaafi zyada energy leta hai:

PIM KYA hai?

Yeh kaise help karta hai? (First principles se derivation)

Ek aisa workload lo jo $N$ bytes touch karta hai aur $C$ compute operations karta hai. Classic von Neumann machine par total time:

$T_{v N} = bus se move, bandwidth B \frac{N}{B} + rate R par compute \frac{C}{R}$

Data-intensive jobs ke liye $C$ , $N$ ke relative chhota hota hai, toh $T_{v N} \approx N / B$ : bandwidth-bound.

PIM effective bandwidth badal deta hai. Agar memory ke $k$ banks hain jo locally parallel compute kar rahe hain, toh internal bandwidth $B_{in t}$ , external bus $B$ se kaafi zyada ho sakti hai:

$B_{in t} = k \cdot B_{bank} ≫ B$

Toh: $T_{P I M} \approx \frac{N}{B _{in t}} + \frac{C}{R}, Speedup = \frac{T _{v N}}{T _{P I M}} \approx \frac{B _{in t}}{B} = k \cdot \frac{B _{bank}}{B}$

Worked example 1 — Kya mera workload PIM-ing ke laayak hai? (arithmetic intensity)

Worked example 2 — Speedup estimate

Common mistakes (Steel-manned)

Feynman

Recall 12-saal ke bachche ko explain karo (click to reveal)

Socho tum ek chef (CPU) ho aur tumhara saamaan ek door warehouse mein (memory) hai. Khaana banana fast hai, lekin har gajar ke liye warehouse tak bhaagna exhausting aur slow hai. Processing-in-memory aise hai jaise warehouse ke andar hi ek choti si kitchen rakh do, taaki tum veggies wahan kaato jahan woh stored hain aur sirf taiyaar dish wapas le jaao. Tum bahut saara bhaagna-dhaana bachate ho — aur bhaagna-dhaana hi woh tiring part tha shuru se.

Active Recall

PIM primarily kaun si problem attack karta hai?

Memory wall — memory aur processor ke beech data move karne ki bandwidth/energy cost.

Data movement computation se energetically worse kyun hai?

Chip ke across ek bit move karna ek single arithmetic op ki energy se ~100–1000× zyada cost karta hai, toh data-intensive workloads mein movement total energy dominate karta hai.

Arithmetic intensity define karo aur PIM mein uska role.

I = C/N (ops per byte moved); low I ka matlab bandwidth-bound hai aur acha PIM candidate hai; high I ka matlab compute-bound hai aur PIM kam help karta hai.

Processing-near-memory aur processing-using-memory mein kya fark hai?

PNM ordinary logic ko physically memory ke paas rakhta hai (e.g., HBM logic die); PUM memory array ki analog physics use karke compute karta hai (e.g., crossbar MVM).

Ek memristor crossbar matrix–vector multiply kaise compute karta hai?

Ohm's law har cell par I=GV deta hai; Kirchhoff's current law har row par currents ko dot product mein sum karta hai, toh poore matrix ke liye ek analog step mein I=G·V milta hai.

Near-memory PIM ke liye approximate speedup formula kya hai?

Speedup ≈ B_int / B = k·(B_bank / B), internal parallel bandwidth aur external bus bandwidth ka ratio.

PIM zyada cache add karne jaisa kyun nahi hai?

Cache CPU side par reused (temporal-locality) data ki help karta hai; PIM trip ko bilkul khatam karta hai, streaming low-reuse data ki help karta hai.

Analog PUM crossbars ka main downside kya hai?

Results approximate hote hain device variation, drift, aur ADC/DAC noise ki wajah se — error-tolerant workloads jaise neural nets ke liye suited hain.

Connections

Memory Wall
HBM 3D-Stacked Memory
Von Neumann Bottleneck
Roofline Model (arithmetic intensity, bandwidth vs compute bound)
Memristor / ReRAM Crossbars
Neural Network Accelerators
Amdahl's Law
DRAM Organization (banks, rows)

PIM exist kyun karta hai? (Woh problem jo yeh solve karta hai)

PIM ke do bade flavors

Worked example 1 — Kya mera workload PIM-ing ke laayak hai? (arithmetic intensity)

Worked example 2 — Speedup estimate

Common mistakes (Steel-manned)

Feynman

Active Recall

Connections

Concept Map