Question bank — MESI - MOESI coherence protocols

False. E ek performance optimization hai (silent E→M writes), correctness requirement nahi. Ek 3-state MSI protocol phir bhi coherent hai — bas har pehle write par broadcast karta hai.

True. M by definition matlab hai tumne ise likha hai aur memory stale hai; agar clean hoti toh tum E mein hote.

MESI mein True. Sharing ke liye sabhi copies ka memory se agree karna zaroori hai. (MOESI mein owner dirty-and-shared hota hai, lekin jo sharers S hold karte hain woh phir bhi woh value read kar rahe hain jo O-owner guarantee karta hai — S copies khud owner ke paas jo hai ussse match karti hain.)

False. E matlab provably akeli copy. Do exclusive holders ek doosre se contradict karte hain; jis pal doosra cache read karta hai, dono ko S (ya MOESI mein O/S) ban jaana chahiye.

True. S precisely multiple-reader case hai — yahi iska poora purpose hai.

False. Har line ka exactly ek owner hota hai; O uss single cache ko designate karta hai jo data supply karne aur eventual write-back ke liye responsible hai. Baaki S hote hain.

True. Store cache word ko locally write karta hai aur state ko M kar deta hai; kyunki tum akele holder the, koi bus message nahi aur koi doosra cache affect nahi hota.

False. Write-through memory ko update karta hai lekin doosre caches mein baithe stale copies ko invalidate nahi karta, toh readers phir bhi purane values dekh sakte hain. Tumhe coherence phir bhi chahiye — Write-back vs Write-through caches dekho.

False. Woh ek hi SWMR invariant enforce karte hain aur aksar wahi MESI/MOESI states; woh sirf isme alag hain ki kaun kisi line ko hold karta hai yeh kaise discover karte hain — broadcast vs ek tracked directory. Snooping vs Directory-based protocols dekho.

False. MOESI tab jeetta hai jab dirty data repeatedly share hota hai (cache-to-cache forwarding memory round-trips se behtar hai), lekin yeh ek state aur complexity add karta hai; read-mostly ya single-writer patterns ke liye MESI ka behaviour identical hai.

Error: yeh S banti hai, E nahi. BusRd matlab doosra cache ab copy chahta hai, toh line provably shared ho jaati hai — sharing status, clean/dirty nahi, E vs S decide karta hai.

Error. BusRdX (Read-for-Ownership) current data ko tumhare cache mein read karta hai aur doosron ko invalidate karta hai; actual store baad mein locally hota hai. Bus par koi naya value nahi hota.

Error. Ek read jo koi doosra holder nahi paata woh E mein land karta hai (sole clean owner). Sirf woh read jo existing copies observe karta hai S mein land karta hai.

Error. MESI dirty+shared forbid karta hai: writing pehle baaki sab ko invalidate karna force karta hai. Dirty+shared combination exactly wahi hai jo MOESI ka O add karta hai.

Error. O ka poora point yahi hai ki cache-to-cache forward karo memory ko touch kiye bina; memory tab likhi jaati hai jab owner finally evict hota hai.

Error. False sharing sahi coherence behaviour hai jo poore cache line par apply hota hai: ek line mein do unrelated variables ownership ko ping-pong karte hain. Fix software layout hai, protocol nahi. False Sharing dekho.

Error. I matlab line us address ke liye koi valid data hold nahi karti — hit impossible hai; koi bhi access miss hai aur bus fetch chahiye.

Error. Coherence per-address hai (sab cores ek location ki value history par agree karte hain); consistency operations ko alag-alag locations mein order karta hai. Cache Coherence vs Memory Consistency dekho.

Kyunki MESI ek writer ko write karne se pehle har doosri copy invalidate karne par majboor karta hai, toh jis pal line dirty hoti hai woh exclusive bhi hoti hai. Koi mechanism doosri copies ko dirty ke saath alive nahi rakhta.

E ek proof hai ki tum akele holder ho, toh likhna kisiko nahi bigaadta — koi notification nahi chahiye. S doosre readers ko admit karta hai jo stale ho sakte hain, toh tumhe pehle BusRdX broadcast karke unhe invalidate karna hoga.

Dirty value jaldi phir change ho sakti hai ya peers ko serve ki ja sakti hai, toh abhi memory mein likhna aksar wasted work hai. Ise owner mein rakhna aur cache-to-cache forward karna memory write ko eviction tak defer karta hai.

M ke paas akeli up-to-date copy hai. Write back kiye bina I mein drop karna sole good value ko destroy kar dega, memory aur baaki sab ko stale data ke saath chodh dega — coherence violate karta hai.

Ek uncontended lock acquire karna uss line par read-then-write hai jise koi nahi touch karta; E likhne ko zero bus messages ke saath E→M karne deta hai, toh common (uncontended) path almost free hai.

Bus aur cache data ko fixed line-sized chunks mein move karte hain, toh sabse chhoti unit jise hardware independently own ya invalidate kar sake woh ek line hai. Finer granularity ke liye bahut zyada state bits aur bus complexity chahiye hogi. (Yahi wajah hai ki false sharing exist karta hai.)

Kuch nahi. Yeh read hit hai; state M rehti hai aur koi bus traffic nahi hota — apne dirty data ke cached reads local hain.

Koi nahi. M→M ek local store hai; tumhare paas already single-writer ownership hai, toh koi invalidation nahi chahiye.

Interconnect unhe bus arbitration ke zariye serialize karta hai; ek pehle ownership grab karta hai (M mein land karta hai), doosre ki request re-order hoti hai aur effectively re-fetch karta hai, pehle ke release hone ke baad M mein end hota hai.

Nahi. E clean hai (memory se match karti hai), toh ise silently drop kiya ja sakta hai bina write-back ke — E ki ek cost saving.

Nahi. S bhi clean hai, aur doosre sharers (ya memory) phir bhi value hold karte hain; silent drop.

Owner ke paas akeli dirty copy hai, toh eviction write-back ko memory mein force karta hai. Yeh woh deferred write hai jise MOESI postpone karta raha hai.

I → (read) E → (write) M, aur M mein rehti hai. Ise kabhi S/O nahi chahiye aur kabhi invalidations emit nahi karta — fully private, sabse sasta case.

MESIF ek F (Forward) state add karta hai taaki exactly ek sharer read requests ka jawab de (fast cache-to-cache) instead of kaafi saare caches ya memory ke respond karne ke; AMD ka MOESI instead dirty data ko O ke zariye shareable rakhta hai. Dono refine karte hain kaun data supply karta hai, SWMR guarantee nahi.