Parent note padhne se pehle, tumhare paas kuch words aur pictures ka ek chota sa collection hona chahiye. Yeh page har ek ko zero se build karta hai, ek aisi order mein jahan har idea sirf pehle waale ideas par depend karta hai. Yahan yeh assume nahi kiya gaya ki tum pehle se jaante ho "pipeline" ya "register" kya hota hai.
Picture: ek recipe socho. Har numbered line ("ek egg todo", "hilao") ek instruction hai. CPU woh cook hai jo list ke upar se neeche kaam kar raha hai.
Topic ko yeh kyun chahiye: speculation future recipe lines ko early karne ke baare mein hai, pehle yeh sure hone se ki tumhein unki zarurat hai. "Aage kaam karna" ke baare mein baat karna tabhi possible hai jab pehle yeh maana jaaye ki ek program ordered atoms ki ek list hai.
Picture: ek kitchen worktop (registers = tumhare saamne kuch bowls), ek pantry (memory), aur ek chhoti status light (flag). Parent note teeno ko milake architectural state kehta hai — woh cheez jo ek program ko dekhne ki permission hai.
Topic ko yeh kyun chahiye: speculation ki poori trick yeh hai ki inhein visibly tabhi change karo jab tum sure ho. Toh pehle yeh jaanna zaroori hai ki "visible stuff" aakhir hai kya.
Picture (upar wali figure): ek single track jo do mein split ho jaati hai. Pale-yellow diamond branch instruction hai; blue "taken" path hai, pink "not-taken" hai. CPU ek train hai jise choose karna hai pehle yeh jaanne se ki kaunsa track sahi hai.
Topic ko yeh kyun chahiye: branches hi woh wajah hain jinki wajah se speculation exist karta hai. Agar code kabhi fork na kare, toh CPU hamesha jaanta ki aage kya aata hai aur kabhi guess nahi karna padta. Pipeline hazards dekho, yeh samajhne ke liye ki fork specifically stall kyun cause karta hai.
Picture (upar wali figure): ek car wash. Kisi bhi moment par ek gaadi soap ho rahi hai, doosri rinse ho rahi hai, teesri dry ho rahi hai. Parent kehta hai pipelines "15–20+ stages" ki hoti hain — matlab ek saath 15–20 gaadiyaan wash mein hain.
Topic ko yeh kyun chahiye: speculation ka poora faydabubbles fill karna hai. Pipeline jitna deeper, ek stalled branch utne zyada bubbles create karta hai, aur speculation utna zyada bachata hai. Yeh directly Instruction-level parallelism (ILP) par build karta hai — ek saath kai instructions chalana — aur Superscalar architecture par, jo line ko ek se zyada gaadi per stage tak widen karta hai.
Ab speculation ke paanch verbs. Har ek tab hi samajh aata hai jab tumhare paas branches, pipeline, aur cycles ho.
Picture (upar wali figure): do timelines. Upar (correct guess): CPU blue path par aage nikalta hai aur sab kuch commit hota hai — koi waqt waste nahi. Neeche (wrong guess): CPU blue par nikalta hai, discover karta hai ki pink sahi tha, blue kaam ko squash karta hai (cross-out block), aur refetch karta hai — yellow gap penalty hai.
Yeh poore topic mein sabse important distinction hai.
Picture: architectural state final published essay hai; microarchitectural state tumhari messy draft notebook hai. Tum notebook erase kar sakte ho (squash) aur kisi ko pata nahi chalega — lagbhag. Parent ka Spectre section twist hai: notebook faint smudges chhod jaata hai (cache timing) jo ek attacker padh sakta hai. Cache side-channel attacks dekho.
Topic ko yeh kyun chahiye: is do-layer picture ke bina, galat kaam "undo" karna impossible lagta hai, aur Spectre magic lagta hai. Iske saath, dono obvious hain: visible layer ko undo karo, lekin private layer ek smudge rakh jaata hai.
Yeh layer Out-of-order execution se bhi connect hoti hai — instructions execute hoti hain jab unke inputs ready hote hain, list order mein nahi — aur ROB hi CPU ko allow karta hai ki execution reorder kare phir bhi commit in order kare.
CPU ka ek chhota order; ek program inki ek ordered list hoti hai.
Architectural state ke teen parts batao.
Registers, memory, aur flags — woh state jo software dekhne ki permission rakhta hai.
= aur == mein kya fark hai?
= ek value store karta hai; == ek yes/no equality sawaal poochhta hai.
Branch kya hai aur yeh stall kyun force karta hai?
Ek fork jahan CPU ko ek rasta chunna hota hai; jab tak condition resolve nahi hoti, fetch ko pata nahi hota ki kaunsi instructions grab karni hain, bubbles cause hote hain.
Pipeline depth N ka matlab kya hai, aur bada N mispredictions ko costly kyun banata hai?
Overlapped stages/in-flight instructions ki sankhya; galat guess N−1 tak squash karta hai, toh zyada kaam waste hota hai.
Pipeline bubble kya hota hai?
Ek idle wasted cycle jahan ek stage missing information ka intezaar karta hai.
Speculation ki har cost kis unit mein measure hoti hai?
CPU clock cycles.
Speculation ke paanch verbs order mein batao.
Predict, checkpoint, verify, commit (agar sahi) ya squash (agar galat).
Commit hone se pehle speculative results kahan wait karte hain?
Reorder Buffer (ROB) mein, jo microarchitectural state ka hissa hai.
Architectural aur microarchitectural state mein core fark kya hai?
Architectural = visible promise (registers/memory); microarchitectural = private scratchpads/caches, turant update hote hain aur squash par (zyaadatar) erasable hain.
Squash perfectly invisible kyun nahi hai?
Speculative loads cache mein data chhod sakte hain; woh cache ko time karna secret leak karta hai (Spectre / side channels).
