TMR and voting logic ka parent note ek pile of shorthand pe rely karta hai. Uss shorthand ko abhi list karne ki bajaye (pehle mile bina woh sirf noise hoga), yeh page har symbol ko sirf tab introduce karta hai jab humein uski zaroorat ho, har ek ko scratch se build karte hue, ek aisi order mein jahan har idea apne pehle wale idea pe rest karta hai. Ek 12-saal ka bachcha jisne yeh kabhi nahi dekha, line one se follow kar sake.
Ise picture karo. Teen identical vending machines side by side khadi hain. Teeno pe same button dabaao; har ek ek can drop karta hai. Same machine, teen bodies.
Topic ko iske zaroorat kyun hai. TMR define hota hai teen modules se. "Kuch identical copies mein se ek copy" ka idea kiye bina, redundancy shabd ka koi matlab nahi.
Figure 1 — Ek input x (yellow) teen identical modules M1,M2,M3 (blue boxes) mein fan out karta hai, har ek apna output y1,y2,y3 (green) produce karta hai. Takeaway: machine same hai; sirf body aur label number alag hai.
Ise picture karo. Ek box jiske left mein ek slot hai (x andar jaata hai) aur right mein ek slot hai (y bahar aata hai). Box ka andar rule f hai.
Kyunki har module same rule ko same input pe run karta hai, isliye hum har module ka output likhte hain:
yi=Mi(x)
Yahan yi hai "copy number i ka output". Dhyaan se padho: Mimachine hai (box), jabki yi woh number hai jo usse nikalta hai. Agar sabhi copies healthy hain, toh y1=y2=y3. Agar ek broken hai, uska y disagree karta hai.
Topic ko iske zaroorat kyun hai. Voter y1,y2,y3 compare karta hai. Baaki sab kuch inn teen outputs ka comparison hai, isliye pehle inhein name karna zaroori hai.
Ise picture karo. Length 1 ki ek bar. R fraction ko green colour karo (works) aur baaki 1−R ko red (fails). Dono pieces hamesha full bar tak add hote hain.
Figure 2 — Certainty bar ki total length 1 hai. Green slice R hai (module works); red slice 1−R hai (module fails). Takeaway: work aur fail sirf do hi outcomes hain, isliye unki probabilities exactly 1 tak add up honee chahiye.
Topic ko iske zaroorat kyun hai. TMR ka poora point reliability raise karna hai. Yeh prove karne ke liye ki yeh help karta hai, humein pehle aur baad R measure karna hoga — isliye R aur 1−R poori derivation ki currency hain.
Ise picture karo. Do coins toss karo. Heads-then-heads ka chance 21×21=41 hai, kyunki 2×2 grid ke chaar equally-likely corners mein se sirf ek "both heads" hai. 21 ki jagah R rakh do aur tum paoge R2; teen copies ke liye, R3.
Topic ko iske zaroorat kyun hai. Parent ka Step 1, "P(all 3 work)=R3", tabhi sach hai jab failures independent hon. Yeh assumption real life mein fragile hai — jab yeh toot jaata hai tum paate ho Common-Cause Failures, jiske baare mein topic warn karta hai.
Ise picture karo. Teen switches; exactly do ON karne hain. List karo: (1,2), (1,3), (2,3). Teen pictures, isliye number 3.
Topic ko iske zaroorat kyun hai. "Exactly 2 of 3 work" 3 distinct arrangements mein ho sakta hai, har ek ki probability R2(1−R) hai. Toh total 3R2(1−R) hai — parent ka Step 2. Counting factor ke bina tum teen baar undercount karte.
Abhi hamare paas do pieces hain: R3 (teeno kaam karte hain) aur 3R2(1−R) (exactly do kaam karte hain). Ek TMR system healthy hai jab kam se kam do modules kaam karein, yaani "teeno kaam karte hain" ya "exactly do kaam karte hain". "Or" combine karne ke liye humein probability ka ek aur rule chahiye.
"Teeno kaam karte hain" aur "exactly do kaam karte hain" disjoint hain: tum same trial mein teeno ko working aur exactly ek ko failing nahi rakh sakte — survivors ki count ya toh 3 hai ya 2, kabhi dono nahi. Toh hum unhe add kar sakte hain.
Sanity check.R=0.9 ke saath: RTMR=0.81×(3−1.8)=0.81×1.2=0.972 — ek single module ke 0.9 se better. Yeh exactly woh formula hai jo parent note use karta hai; ab tum jaante ho har term kahan se aaya.
Ise picture karo. Ek slide jo full height se start hoti hai aur gently neeche curve hoti jaati hai, kabhi floor ko touch nahi karti. Steep slide = bada λ.
Figure 3 — Reliability over time, R(t)=e−λt, ek slow-failing module ke liye (blue, small λ) aur ek fast-failing ke liye (red, large λ). Dono R=1 (yellow dot) se start hote hain aur 0 ki taraf curve karte hain bina use touch kiye. Takeaway: bada λ = steep drop = chhoti useful life.
Yahi tool kyun, straight line kyun nahi? Ek straight line eventually zero se neechey cross kar jaati (probability ke liye impossible) aur assume karti ki cheezein ek fixed clock time pe fail hoti hain. e−λt ki jagah kehta hai "har equal time slice mein, survivors ka same fraction fail hota hai" — random hardware death ka natural model. Yahi wajah hai ki parent likhta hai R(t)=e−λt.
Ab tak Mi matlab tha poori machine aur yi matlab tha uska output number. Voter circuit ke baare mein cleanly baat karne ke liye, hum sabse simple case mein zoom karte hain jahan har output sirf ek bit hai — sirf 0 ya 1. Inn teen bits ko ==b1,b2,b3== kaho, jahan bi module i ka one-bit output hai (toh bi=yi jab output already ek single bit hai).
Voter ko ek sentence ki tarah padho.V=b1b2+b2b3+b1b3
"V1 hai agar bits 1-and-2 dono 1 pe agree karein, OR bits 2-and-3 karein, OR bits 1-and-3 karein." Koi bhi pair1 pe agree kare toh V=1 force ho jaata hai — yeh exactly "teen mein se kam se kam do" hai.
Figure 4 — Majority voter: teen AND gates (yellow), har ek module ke pair ke liye, ek single OR gate (green) ko feed karte hain jo V output karta hai. Takeaway: V=1 jab bhi koi ek pair 1 pe agree kare, yaani jab bhi teen inputs mein se kam se kam do 1 hon.
Topic ko iske zaroorat kyun hai. Yeh woh digital voter hai jo V produce karta hai. Continuous (analog) outputs ke liye same "odd one out ignore karo" kaam median karta hai — aage define kiya gaya hai.
Neeche ka diagram ek dependency graph hai: ise top-to-bottom padho, har box is page ka ek idea hai, aur har arrow ka matlab hai "tail pe idea pehle samajhna zaroori hai head pe idea se pehle". Koi bhi arrows ka path follow karo aur tum exactly usi order mein chal rahe ho jisme humne cheezein build ki; har path eventually "TMR topic" box mein funnel ho jaata hai.